DISPLAY DEVICE

• US 20180033354A1
• Filed: 03/10/2017
• Published: 02/01/2018
• Est. Priority Date: 08/01/2016
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: LEE, Seung-Kyu, KWON, Tae Hoon, KA, Ji-Hyun, KWAK, Won Kyu, KIM, Dong Soo, BAE, Han-Sung, SHIN, Hey Jin, CHA, Seung Ji
• Granted Patent: US 10,210,782 B2
• Time in Patent Office: Days
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2330/12 Test circuits or failure detection circuits included in a display system, as permanent part thereof
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309

Abstract

A display device includes a peripheral area around a display area, a plurality of pixels in the display area, and a plurality of signal lines connected to the pixels. The signal lines include a plurality of data lines connected to the pixels, a crack detection line connected to first data lines among the data lines through a first transistor, and a control line connected to a gate of the first transistor. The crack detection line is in the peripheral area.

Claims

1. A display device, comprising:

a substrate including a peripheral area around a display area;

a plurality of pixels in the display area of the substrate; and

a plurality of signal lines on the substrate and connected to the pixels,

wherein the signal lines include;

a plurality of data lines connected to the pixels,

a crack detection line connected to first data lines among the data lines through a first transistor, the crack detection line in the peripheral area, and

a control line connected to a gate of the first transistor.

2. The display device as claimed in claim 1, wherein the first transistor is in the peripheral area.

3. The display device as claimed in claim 2, further comprising:

a plurality of data pads in the peripheral area and connected to the data lines, each of the data pads to transfer a data voltage to be applied to the pixels, wherein the first transistor is in an area between the data pads and the data lines.

4. The display device as claimed in claim 1, wherein the crack detection line is a wire that runs around the display area.

5. The display device as claimed in claim 1, wherein the crack detection line is in a zigzag pattern along one edge of the display area.

6. The display device as claimed in claim 1, wherein the crack detection line is connected to a first voltage pad that is to apply a black grayscale-level voltage.

7. The display device as claimed in claim 1, wherein the crack detection line and the data lines are on different layers.

8. The display device as claimed in claim 1, wherein the signal lines include:

a test voltage line connected to second data lines through a second transistor, wherein the second data lines are different from the first lines.

9. The display device as claimed in claim 8, wherein the test voltage line has a resistance value corresponding to a resistance value of the crack detection line.

10. The display device as claimed in claim 8, wherein a resistance value of the test voltage line is proportional to an intensity of a resistance value of the crack detection line and a number of the first data lines and is inversely proportional to a number of the second data lines.

11. The display device as claimed in claim 8, wherein the crack detection line and the test voltage line are on a same layer.

12. The display device as claimed in claim 8, wherein the test voltage line is connected to a first voltage pad which is to apply a black grayscale-level voltage.

13. The display device as claimed in claim 8, wherein the control line is connected to a gate of the second transistor.

14. A display device, comprising:

a display area;

a non-display area; and

a crack detection line extending from the non-display area to the display area, wherein the crack detection line is connected to an internal data line between first and last data lines in the display area.

15. The display device as claimed in claim 14, wherein the crack detection line is connected to a test voltage pad.

16. The display device as claimed in claim 14, further comprising:

a transistor,

wherein the crack detection line is connected to the internal data line through the transistor.

17. The display device as claimed in claim 16, wherein the transistor has a gate connected to a test control pad.

18. The display device as claimed in claim 16, wherein the transistor is in the non-display area.