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MEMORY DEVICE AND METHOD OF OPERATING THE SAME

  • US 20180033492A1
  • Filed: 01/05/2017
  • Published: 02/01/2018
  • Est. Priority Date: 07/28/2016
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • a plurality of memory cells stacked along pillar vertical'"'"'a substrate;

    a peripheral circuit configured to program and verifying memory cells coupled to a selected word line, among the memory cells; and

    a control logic configured to control the peripheral circuit so that a pass voltage applied to unselected word lines is adjusted depending on a location of the selected word line when the memory cells are verified.

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