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Configurable Gate Array Based on Three-Dimensional Writable Memory

  • US 20180041216A1
  • Filed: 10/13/2017
  • Published: 02/08/2018
  • Est. Priority Date: 03/05/2016
  • Status: Active Grant
First Claim
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1. A configurable gate array, comprising:

  • at least a configurable logic element formed on a semiconductor substrate, wherein said configurable logic element selectively realizes a logic function from a logic library; and

    at least a configurable computing element, wherein said configurable computing element comprises a first three-dimensional writable memory (3D-W) array stacked above said semiconductor substrate, said first 3D-W array is electrically programmable and can be loaded with a first look-up table (LUT) for a first math function.

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