Image processing method and related apparatus

• US 20180048914A1
• Filed: 08/10/2017
• Published: 02/15/2018
• Est. Priority Date: 08/11/2016
• Status: Abandoned Application

• Current Assignee: Novatek Microelectronics Corporation (Novatek Microelectronics Corp Limited)
• Original Assignee: Novatek Microelectronics Corporation (Novatek Microelectronics Corp Limited)
• Inventors: Cho, Sheng-Tien, Cheng, Ching-Pei, Yang, Hsueh-Yen
• Application Number:
  US15/673,432
• Publication Number:
  US 20180048914A1
• Time in Patent Office: Days
• CPC Class Codes: G09G 2340/02 Handling of images in compressed format, e.g. JPEG, MPEG
• CPC Class Codes: G09G 2340/0457 Improvement of perceived resolution by subpixel rendering
• CPC Class Codes: G09G 5/00 Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators image data processing or generation, in general G06T
• CPC Class Codes: H04N 19/182 the unit being a pixel
• CPC Class Codes: H04N 19/44 Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
• CPC Class Codes: H04N 19/60 using transform coding
• CPC Class Codes: H04N 23/63 by using electronic viewfinders
• CPC Class Codes: H04N 23/84 for processing colour signals

Abstract

An image processing method includes performing subpixel rendering operation on a first image data to generate a second image data; and encoding the second image data to generate a third image data which has a size smaller than a size of the second image data.

Claims

1. An image processing method comprising:

performing subpixel rendering operation on a first image data to generate a second image data; and

encoding the second image data to generate a third image data which has a size smaller than a size of the second image data.

2. The image processing method of claim 1, further comprising:

storing the third image data in a frame buffer; and

decoding the third image data to generate a fourth image data to be displayed.

3. The image processing method of claim 2, wherein performing subpixel rendering operation on the first image data, encoding the second image data, storing the third image data, and decoding the third image data are operated in an image processing apparatus.

4. The image processing method of claim 3, further comprising:

performing, in the image processing apparatus, image enhancement on an original image data to generate the first image data.

5. The image processing method of claim 3, wherein the image processing apparatus is a display driver IC or a timing controller.

6. The image processing method of claim 2, wherein performing subpixel rendering operation on the first image data and encoding the second image data are operated in a first image processing apparatus, and storing the third image data and decoding the third image data are operated in a second image processing apparatus.

7. The image processing method of claim 6, further comprising:

performing, in the first image processing apparatus, image enhancement on an original image data to generate the first image data.

8. The image processing method of claim 6, wherein the first image processing apparatus is a processor, and the second image processing apparatus is a display driver IC or a timing controller.

9. The image processing method of claim 1, wherein performing subpixel rendering operation on the first image data and encoding the second image data are operated in a processor.

10. An image processing apparatus, configured to render image displayed on a display, the image processing apparatus comprising:

a subpixel rendering unit, configured to perform subpixel rendering operation on a first image data to generate a second image data; and

a compression encoder, configured to encode the second image data to generate a third image data which has a size smaller than a size of the second image data.

11. The image processing apparatus of claim 10, further comprising:

a frame buffer, configured to store the third image data; and

a compression decoder, configured to decode the third image data to generate a fourth image data to be displayed.

12. The image processing apparatus of claim 10, further comprising:

an image enhancement unit, configured to perform image enhancement on an original image data to generate the first image data.

13. The image processing apparatus of claim 11, wherein the image processing apparatus is a display driver IC or a timing controller.

14. The image processing apparatus of claim 10, wherein the image processing apparatus is a processor.

15. The image processing apparatus of claim 14, further comprising:

an image enhancement unit, configured to perform image enhancement on an original image data to generate the first image data.