Semiconductor Devices and Methods for Forming a Semiconductor Device

• US 20180061742A1
• Filed: 08/24/2017
• Published: 03/01/2018
• Est. Priority Date: 08/25/2016
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Ananiev, Sergey, Bauer, Robert, Koerner, Heinrich, Tan, Yik Yee, Walter, Juergen
• Granted Patent: US 10,867,893 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05557 comprising protrusions or indentations
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13101 the principal constituent melting at a temperature of less than 400°C
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/484 Connecting portions
• CPC Class Codes: H01L 2224/48507 comprising an intermetallic compound
• CPC Class Codes: H01L 2224/48824 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/85365 Shape, e.g. interlocking features
• CPC Class Codes: H01L 23/488 consisting of soldered or bonded constructions bump connectors H01L24/01
• CPC Class Codes: H01L 23/564 Details not otherwise provided for, e.g. protection against moisture getters H01L23/26
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/09 of a plurality of bonding areas
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 : Solder alloys

Abstract

A semiconductor device includes an electrically conductive contact pad structure. Moreover, the semiconductor device includes a bond structure. The bond structure is in contact with the electrically conductive contact pad structure at least at an enclosed interface region. Additionally, the semiconductor device includes a degradation prevention structure laterally surrounding the enclosed interface region. The degradation prevention structure is vertically located between a portion of the bond structure and a portion of the electrically conductive contact pad structure.

Claims

1. A semiconductor device comprising:

an electrically conductive contact pad structure;

a bond structure in contact with the electrically conductive contact pad structure at an enclosed interface region; and

a degradation prevention structure laterally surrounding the enclosed interface region, wherein the degradation prevention structure is vertically located between a portion of the bond structure and a portion of the electrically conductive contact pad structure.

2. The semiconductor device according to claim 1, wherein the electrically conductive contact pad structure comprises a first predominant electrically conductive material, wherein the bond structure comprises a second predominant electrically conductive material different from the first predominant electrically conductive material, wherein at least one of the electrically conductive contact pad structure and the bond structure comprises an intermetallic phase region at the enclosed interface region.

3. The semiconductor device according to claim 1, wherein a minimal width of the degradation prevention structure is larger than 1 μ

m.

4. The semiconductor device according to claim 1, wherein the bond structure is in contact with the electrically conductive contact pad structure additionally at a peripheral interface region.

5. The semiconductor device according to claim 4, wherein the peripheral interface region laterally surrounds the degradation prevention structure.

6. The semiconductor device according to claim 1, wherein a maximal lateral extension of the enclosed interface region is smaller than 90% of a maximal lateral extension of an overall interface region between the electrically conductive contact pad structure and the bond structure.

7. The semiconductor device according to claim 1, wherein a plurality of enclosed interface regions is located between the electrically conductive contact pad structure and the bond structure, wherein each enclosed interface region is laterally surrounded by the degradation prevention structure.

8. The semiconductor device according to claim 1, wherein a total lateral area of the enclosed interface region or of all enclosed interface regions is larger than 60% of a lateral area of an overall interface region between the electrically conductive contact pad structure and the bond structure.

9. The semiconductor device according to claim 1, wherein a minimal vertical distance between the degradation prevention structure and a backside surface of the electrically conductive contact pad structure is larger than 100 nm.

10. The semiconductor device according to claim 1, further comprising a semiconductor package structure, wherein the semiconductor package structure comprises mold material, wherein the enclosed interface region is separated from the mold material by the degradation prevention structure.

11. The semiconductor device according to claim 10, wherein the mold material of the semiconductor package structure is in contact with a portion of the electrically conductive contact pad structure outside the enclosed interface region and is in contact with the bond structure.

12. The semiconductor device according to claim 1, wherein the degradation prevention structure comprises a solid dielectric material structure formed on a surface of the electrically conductive contact pad structure.

13. The semiconductor device according to claim 1, wherein the degradation prevention structure comprises a trench extending into the electrically conductive contact pad structure.

14. The semiconductor device according to claim 13, wherein the trench is filled with a solid dielectric material, or wherein a cavity is located in the trench.

15. The semiconductor device according to claim 1, wherein a vertical extension of the degradation prevention structure is larger than 500 nm.

16. The semiconductor device according to claim 1, wherein the degradation prevention structure comprises an electrically conductive layer, wherein the electrically conductive layer comprises an electrically conductive material different from a material of the electrically conductive contact pad structure and different from a material of the bond structure.

17. The semiconductor device according to claim 16, wherein a thickness of the electrically conductive layer is smaller than 1 μ

m.

18. The semiconductor device according to claim 16, wherein the electrically conductive layer extends laterally from the enclosed interface region to an edge of the electrically conductive contact pad structure.

19. A semiconductor device comprising:

an electrically conductive contact pad structure comprising a first predominant electrically conductive material;

a bond structure comprising a second predominant electrically conductive material different from the first predominant electrically conductive material, wherein at least one of the electrically conductive contact pad structure and the bond structure comprises an intermetallic phase region at an interface region between the electrically conductive contact pad structure and the bond structure; and

a degradation prevention structure located laterally adjacent to the intermetallic phase region, wherein the degradation prevention structure is vertically located between a portion of the bond structure and a portion of the electrically conductive contact pad structure.

20. A method for forming a semiconductor device, the method comprising:

forming a degradation prevention structure at an electrically conductive contact pad structure of the semiconductor device, wherein the degradation prevention structure laterally surrounds a portion of a surface of the electrically conductive contact pad structure; and

attaching a bond structure at the portion of the surface of the electrically conductive contact pad structure laterally surrounded by the degradation prevention structure, wherein after attaching the degradation prevention structure is vertically located between a portion of the bond structure and a portion of the electrically conductive contact pad structure.