DISPLAY DEVICE

• US 20180067356A1
• Filed: 09/07/2017
• Published: 03/08/2018
• Est. Priority Date: 09/08/2016
• Status: Active Grant

• Current Assignee: Japan Display Incorporated
• Original Assignee: Japan Display Incorporated
• Inventors: Katsuta, Tadayoshi
• Granted Patent: US 10,409,102 B2
• Time in Patent Office: Days
• CPC Class Codes: G02F 1/133302 Rigid substrates, e.g. inorganic substrates
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: G02F 2201/44 Arrangements combining different electro-active layers, e.g. electrochromic, liquid crystal or electroluminescent layers
• CPC Class Codes: G02F 2201/56 Substrates having a particular shape, e.g. non-rectangular
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2310/0281 Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2320/02 Improving the quality of display appearance
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 3/2096 Details of the interface to the display terminal specific for a flat panel suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/131 : Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/1315 : comprising structures specially adapted for lowering the resistance

Abstract

A light shielding layer overlapping with a peripheral region of a display device includes extension portions each extending along a Y direction, bent portions located between the extension portions, and another extension portion located between the bent portions. In a region overlapping with the another extension portion, an enable line (first potential supply line), which supplies a potential to a plurality of scanning signal lines via a driving circuit (first driving circuit), goes through a wiring layer (first wiring layer) and another wiring layer (second wiring layer) made of a material having resistivity lower than that of the wiring layer.

Claims

1. A display device comprising:

a display region in which first pixels are arrayed;

a peripheral region overlapping with a light shielding layer and being outside the display region;

a plurality of scanning signal lines and a plurality of video signal lines within the display region;

a first driving circuit and a second driving circuit supplying a scanning signal;

a first potential supply line supplying a potential to the plurality of scanning signal lines via the first driving circuit; and

a first wiring layer and a second wiring layer made of a material having resistivity lower than that of the first wiring layer,

wherein the plurality of video signal lines extend in a first direction,

wherein the light shielding layer includes a first extension portion and a second extension portion each extending along the first direction, a first bent portion and a second bent portion located between the first extension portion and the second extension portion, and a third extension portion located between the first bent portion and the second bent portion,

wherein the first extension portion is connected to the first bent portion, and the second extension portion is connected to the second bent portion,

wherein the first potential supply line overlaps with the third extension portion,

wherein the plurality of scanning signal lines include a first scanning signal line and a second scanning signal line,

wherein the first scanning signal line extends from the third extension portion in plan view, and the second scanning signal line extends from the first extension portion in plan view,

wherein, in plan view, the number of the plurality of video signal lines crossed by the first scanning signal line is different from the number of the plurality of video signal lines crossed by the second scanning signal line within the display region, and

wherein, in a region overlapping with the third extension portion, the first potential supply line goes through the first wiring layer and the second wiring layer.

2. The display device according to claim 1,

wherein the first driving circuit includes a first A circuit block, a first B circuit block, a first C circuit block, and a first D circuit block,

wherein the first potential supply line goes through the first wiring layer between the first A circuit block and the first B circuit block at a first distance and goes through the first wiring layer between the first C circuit block and the first D circuit block at a second distance, and

wherein the second distance is longer than the first distance.

3. The display device according to claim 1, further comprising:

a second potential supply line supplying a potential to the plurality of scanning signal lines via the second driving circuit,

wherein the first driving circuit includes a first A circuit block and a first B circuit block,

wherein the first potential supply line goes through the first wiring layer between the first A circuit block and the first B circuit block at a first distance,

wherein the second driving circuit includes a second A circuit block and a second B circuit block,

wherein the second potential supply line goes through the first wiring layer between the second A circuit block and the second B circuit block at a third distance,

wherein the first A circuit block and the second A circuit block are connected to the same scanning signal line among the plurality of scanning signal lines, and

wherein the first distance is longer than the third distance.

4. The display device according to claim 1, further comprising:

a second potential supply line supplying a potential to the plurality of scanning signal lines via the second driving circuit,

wherein the first driving circuit includes a first C circuit block and a first D circuit block,

wherein the first potential supply line goes through the first wiring layer and the second wiring layer between the first C circuit block and the first D circuit block,

wherein the second driving circuit includes a second C circuit block and a second D circuit block,

wherein the second potential supply line goes through the second wiring layer and does not go through the first wiring layer between the second C circuit block and the second D circuit block, and

wherein the first D circuit block and the second D circuit block are connected to the same scanning signal line among the plurality of scanning signal lines.

5. The display device according to claim 1,

wherein a part of the first potential supply line overlaps with the first extension portion, and

wherein, in a region overlapping with the first extension portion, the first potential supply line goes through the second wiring layer and does not go through the first wiring layer.

6. The display device according to claim 1,

wherein, in plan view, the first scanning signal line includes a main wiring portion located between the first driving circuit and the display region and within the display region, and a sub-wiring portion connected to the main wiring portion and located between the first driving circuit and an outer edge of the peripheral region, and

wherein, in plan view, the sub-wiring portion crosses the video signal lines.

7. The display device according to claim 6,

wherein, in plan view, the sub-wiring portion includes a first wiring portion connected to the main wiring portion, and a second wiring portion connected to the first wiring portion and extending in a position different from the first wiring portion in the peripheral region, and

wherein the sub-wiring portion crosses the video signal lines at multiple places in the peripheral region.

8. The display device according to claim 6,

wherein the second scanning signal line does not include the sub-wiring portion, and

wherein, in plan view, the number of the plurality of video signal lines crossed by the first scanning signal line is smaller than the number of the plurality of video signal lines crossed by the second scanning signal line within the display region.

9. The display device according to claim 6, further comprising:

an electro-optical layer; and

a plurality of first electrodes driving the electro-optical layer, and a second electrode facing the plurality of first electrodes,

wherein the sub-wiring portion overlaps with the second electrode.

10. The display device according to claim 1,

wherein a length of the second extension portion is longer than a length of the first extension portion.

11. A display device comprising:

a display region in which first pixels are arrayed;

a peripheral region overlapping with a light shielding layer and being outside the display region;

a plurality of scanning signal lines and a plurality of video signal lines within the display region;

a first control circuit supplying a video signal;

a first driving circuit and a second driving circuit supplying a scanning signal;

an electro-optical layer; and

a plurality of first electrodes driving the electro-optical layer, and a second electrode facing the plurality of first electrodes,

wherein the plurality of video signal lines extend in a first direction,

wherein the plurality of scanning signal lines include a first scanning signal line and a second scanning signal line,

wherein the first scanning signal line overlaps with the second electrode in the peripheral region,

wherein, in plan view, the number of the plurality of video signal lines crossed by the first scanning signal line is smaller than the number of the plurality of video signal lines crossed by the second scanning signal line within the display region, and

wherein a length at which the first scanning signal line overlaps with the second electrode is longer than a length at which the second scanning signal line overlaps with the second electrode.

12. The display device according to claim 11,

wherein a part of the plurality of scanning signal lines includes a main wiring portion located between the first driving circuit and the display region and within the display region, and a sub-wiring portion connected to the main wiring portion and located between the first driving circuit and an outer edge of the peripheral region, and

wherein, in plan view, the sub-wiring portion overlaps with the second electrode.

13. The display device according to claim 12,

wherein the plurality of scanning signal lines include a third scanning signal line and a fourth scanning signal line,

wherein, in plan view, each of the third scanning signal line and the fourth scanning signal line includes the main wiring portion located between the first driving circuit and the display region and within the display region, and the sub-wiring portion connected to the main wiring portion and located between the first driving circuit and the outer edge of the peripheral region,

wherein, in plan view, the number of the plurality of video signal lines crossed by the third scanning signal line is smaller than the number of the plurality of video signal lines crossed by the fourth scanning signal line within the display region, and

wherein, in the peripheral region, a length at which the sub-wiring portion of the third scanning signal line overlaps with the second electrode is longer than a length at which the sub-wiring portion of the fourth scanning signal line overlaps with the second electrode.

14. The display device according to claim 11,

wherein a part of the first scanning signal line and a part of the second scanning signal line each extend between the first control circuit and the display region.

15. The display device according to claim 11,

wherein the first scanning signal line is closer to the first control circuit than the second scanning signal line, and

wherein a length of the first scanning signal line is longer than a length of the second scanning signal line.

16. A display device comprising:

a display region in which first pixels each including a pixel transistor are arrayed;

a peripheral region overlapping with alight shielding layer and being outside the display region;

a plurality of scanning signal lines and a plurality of video signal lines within the display region;

a first control circuit supplying a video signal;

a first driving circuit and a second driving circuit supplying a scanning signal;

an electro-optical layer; and

a plurality of first electrodes driving the electro-optical layer, and a second electrode facing the plurality of first electrodes,

wherein the plurality of video signal lines extend in a first direction,

wherein the plurality of video signal lines include a first video signal line and a second video signal line,

wherein the first video signal line overlaps with the second electrode in the peripheral region,

wherein, in plan view, the number of the pixel transistors connected to the first video signal line is smaller than the number of the pixel transistors connected to the second video signal line, and

wherein, in the peripheral region, a length at which the first video signal line overlaps with the second electrode is longer than a length at which the second video signal line overlaps with the second electrode.

17. The display device according to claim 16, further comprising:

a selection circuit between the plurality of video signal lines and the first control circuit; and

a plurality of video lead-out wirings between the selection circuit and the first control circuit,

wherein the plurality of video signal lines extend from the selection circuit.

18. The display device according to claim 17,

wherein the plurality of video signal lines include a third video signal line and a fourth video signal line, and

wherein, in plan view, a length of the third video signal line from the selection circuit to the display region is longer than a length of the fourth video signal line from the selection circuit to the display region.

19. The display device according to claim 18,

wherein a length at which the third video signal line overlaps with the second electrode is longer than a length at which the fourth video signal line overlaps with the second electrode.

20. The display device according to claim 16,

wherein the light shielding layer includes a first extension portion and a second extension portion each extending along the first direction, a first bent portion and a second bent portion located between the first extension portion and the second extension portion, and a third extension portion located between the first bent portion and the second bent portion,

wherein the first extension portion is connected to the first bent portion, and the second extension portion is connected to the second bent portion, and

wherein the second extension portion is longer than the first extension portion.