INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND COMPUTER PROGRAM PRODUCT

• US 20180081712A1
• Filed: 02/21/2017
• Published: 03/22/2018
• Est. Priority Date: 09/16/2016
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: KANAI, Jun, TAKUMI, Shinya, HASHIMOTO, Mikio, ISOZAKI, Hiroshi
• Granted Patent: US 10,474,494 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked

Abstract

An information processing apparatus according to an embodiment includes a reception unit and switching unit. The reception unit receives an interrupt. The switching unit that switches a second operating system (which is executing in a core to a first OS to which the interrupt for the first OS is input, when the reception unit receives an interrupt for the core in which the first OS is a priority OS and the second OS is not the priority OS.

Claims

1. An information processing apparatus including a processor that includes one or more cores, the information processing apparatus comprising:

a reception unit that receives an interrupt; and

a switching unit that switches a second operating system (OS) which is executing in a core to a first OS to which the interrupt for the first. OS is input, when the reception unit receives an interrupt for the core in which the first OS is a priority 02 and the second OS is not the priority OS.

2. The apparatus according to claim 1,

wherein the reception unit inputs the interrupt to the first OS in a case where the second OS is switched to the first OS or in a case where the first OS and the second OS coincide with each other and keeps the interrupt on pending in a case where the first OS and the second OS do not coincide with each other, and the second OS is not switched to the first OS.

3. The apparatus according to claim 2,

wherein the switching unit switches the second OS to the first OS when a request for switching the second OS to the first OS is received by the reception unit from the second OS that is in the middle of execution, and

the reception unit inputs an interrupt to the first OS in a case where the interrupt input to the first OS is kept on pending.

4. The apparatus according to claim 1, further comprising:

a selection unit that selects a real time task in a case where an OS executed in the core is the priority OS, and the real time task having a process priority level higher than a non-real time task is in an executable state and selects the non-real time task in a case where an OS executed in the core is the priority OS, and the real time task is not in the executable state; and

a processing unit that processes the real time task selected by the selection unit or the non-real time task selected by the selection unit.

5. The apparatus according to claim 4,

wherein the selection unit selects the non-real time task in a case where the OS executed in the core is not the priority OS and the non-real time task is present.

6. The apparatus according to claim 4,

wherein the reception unit receives a request for switching an OS executed in the core in a case where the OS executed in the core is not the priority OS, and the non-real time task is not present.

7. The apparatus according to claim 1, further comprising an interrupt setting unit that sets a notification destination of an interrupt,

wherein, in a case where a switching destination OS is the priority OS, the switching unit inputs a setting request for inputting an interrupt input to a switching destination OS to the switching destination OS to the interrupt setting unit and inputs a setting request for keeping an interrupt not input to the switching destination OS on pending to the interrupt setting unit.

8. The apparatus according to claim 7,

wherein, in a case where a switching destination OS is not the priority OS, the switching unit inputs a setting request for inputting an interrupt input to a switching destination OS to the switching destination OS to the interrupt setting unit, inputs a setting request for inputting an interrupt input to a priority OS to the reception unit to the interrupt setting unit, and inputs setting request for keeping an interrupt input to an OS other than the switching destination OS and the priority OS on pending to the interrupt setting unit.

9. The apparatus according to claim 4, further comprising:

an inter-core interrupt generating unit that generates an interrupt in a designated core; and

a communication unit that, in a case where an inter-OS communication request for requesting for communication between operating systems is received from the real time task, inputs an inter-core interrupt request in which a core, in which a communication destination OS is set as the priority OS, is designated to the inter-core interrupt generating unit and, in a case where the inter-OS communication request is received from the non-real time task, inputs an inter-core interrupt request in which a core, in which the communication destination OS is not set as the priority OS, is designated to the inter-core interrupt generating unit.

10. The apparatus according to claim 1, further comprising a verification unit that verifies completeness of data of a verification target by calculating a first hash value of the data of the verification target of an alteration stored in the information processing apparatus and comparing the first hash value with a second hash value of the data of the verification target that is not altered.

11. The apparatus according to claim 1, further comprising a protection unit that prohibits rewriting of data of a protection target stored in the information processing apparatus.

12. An information processing method of an information processing apparatus including a processor that includes one or more cores, the information processing method comprising:

receiving an interrupt; and

switching a second operating system (OS) which is executing in a core to a first OS to which the interrupt for the first OS is input, when an interrupt for the core in which the first OS is a priority OS and the second OS is not the priority OS, is received.

13. A computer program product having a non-transitory computer-readable medium that stores therein a computer program causing an information processing apparatus including a processor that includes one or more cores to function as:

a reception unit that receives an interrupt; and

a switching unit that switches a second operating system (OS) which is executing in a core to a first OS to which the interrupt for the first OS is input, when the reception unit receives an interrupt for the core in which the first OS is a priority OS and the second OS is not the priority OS.