Stacked Backside Illuminated SPAD Array

• US 20180090526A1
• Filed: 09/22/2017
• Published: 03/29/2018
• Est. Priority Date: 09/23/2016
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Mandai, Shingo, Niclass, Cristiano L., Karasawa, Nobuhiro, Fan, Xiaofeng, Laflaquiere, Arnaud, Agranov, Gennadiy A.
• Granted Patent: US 10,658,419 B2
• Time in Patent Office: Days
• CPC Class Codes: G01S 7/4861 Circuits for detection, sampling, integration or read-out
• CPC Class Codes: G01S 7/4863 Detector arrays, e.g. charge-transfer gates
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/1461 characterised by the photosensitive area
• CPC Class Codes: H01L 27/14616 characterised by the channel of the transistor, e.g. channel having a doping gradient
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14629 Reflectors
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14665 Imagers using a photoconductor layer
• CPC Class Codes: H01L 31/02027 for devices working in avalanche mode
• CPC Class Codes: H01L 31/03529 Shape of the potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/107 the potential barrier working in avalanche mode, e.g. avalanche photodiodes
• CPC Class Codes: H04N 25/587 acquired sequentially, e.g. using the combination of odd and even image fields
• CPC Class Codes: H04N 25/617 for reducing electromagnetic interference, e.g. clocking noise
• CPC Class Codes: H04N 25/709 : Circuitry for control of the power supply
• CPC Class Codes: H04N 25/745 : Circuitry for generating timing or clock signals
• CPC Class Codes: H04N 25/75 : Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/771 : comprising storage means other than floating diffusion

Abstract

A back-illuminated single-photon avalanche diode (SPAD) image sensor includes a sensor wafer stacked vertically over a circuit wafer. The sensor wafer includes one or more SPAD regions, with each SPAD region including an anode gradient layer, a cathode region positioned adjacent to a front surface of the SPAD region, and an anode avalanche layer positioned over the cathode region. Each SPAD region is connected to a voltage supply and an output circuit in the circuit wafer through inter-wafer connectors. Deep trench isolation elements are used to provide electrical and optical isolation between SPAD regions.

Claims

1. A back-illuminated single-photon avalanche diode (SPAD) image sensor, comprising:

a sensor wafer; and

a circuit wafer positioned below the sensor wafer;

wherein the sensor wafer comprises;

a SPAD region, comprising;

a cathode region positioned adjacent to a front surface of the SPAD region and comprising a first dopant type; and

an anode avalanche layer positioned over the cathode region and comprising a second dopant type; and

an anode gradient layer comprising the second dopant type, the anode gradient layer comprising;

a back edge dopant concentration gradient that extends from a back surface of the anode gradient layer;

a first side edge dopant concentration gradient that extends from an interior of the anode gradient layer to a first side edge of the anode gradient layer; and

a second side edge dopant concentration gradient that extends from the interior of the anode gradient layer to a second side edge of the anode gradient layer.

4. The back-illuminated SPAD image sensor of claim 1, further comprising a guard ring layer adjacent to an avalanche region within the cathode region and the anode avalanche layer, wherein the guard ring layer is doped with the first dopant type and a dopant concentration of the guard ring layer is less than a dopant concentration of the cathode region.

5. The back-illuminated SPAD image sensor of claim 4, wherein an area of the cathode region is substantially equal to an area of the anode avalanche layer.

8. A back-illuminated single-photon avalanche diode (SPAD) image sensor, comprising:

a sensor wafer; and

a circuit wafer positioned below the sensor wafer;

wherein;

the sensor wafer comprises;

a SPAD region, comprising;

an anode gradient layer comprising a first dopant type, the anode gradient layer doped to guide a charge carrier generated adjacent to a side edge of the anode gradient layer away from the side edge and towards an interior of the anode gradient layer;

a cathode region positioned adjacent to a front surface of the sensor wafer and comprising a second dopant type; and

an anode avalanche layer positioned over the cathode region and comprising the first dopant type; and

a guard ring layer adjacent to an avalanche region between the cathode region and the anode avalanche layer, wherein

the guard ring layer is doped with the second dopant type;

a dopant concentration in the guard ring layer is lower than a dopant concentration of the cathode region, and

an area of the cathode region is substantially equal to an area of the anode region.

2. The back-illuminated SPAD image sensor of claim 11, wherein the circuit wafer comprises:

a voltage supply coupled to the SPAD region through a first inter-wafer connector, wherein the voltage supply is configured to supply a high reverse bias voltage to the SPAD region to provide a reverse bias across the cathode region and the anode gradient layer.

3. The back-illuminated SPAD image sensor of claim 11, wherein the circuit wafer comprises an output circuit coupled to the cathode region through a second inter-wafer connector.

6. The back-illuminated SPAD image sensor of claim 2, wherein a depletion region within the anode gradient layer is shaped by a first area of the back edge dopant concentration gradient, a second area of the first side edge dopant concentration gradient, and a third area of the second side edge dopant concentration gradient

7. The back-illuminated SPAD image sensor of claim 6, wherein the depletion region within the anode gradient layer is formed when the reverse bias is applied across the cathode region and the anode gradient layer.

9. The back-illuminated SPAD image sensor of claim 8, wherein the anode gradient layer comprises:

a back edge dopant concentration gradient that extends from the anode avalanche layer to a back surface of the anode gradient layer;

a first side edge dopant concentration gradient that extends from the interior of anode gradient layer to a first side edge of the anode gradient layer; and

a second side edge dopant concentration gradient that extends from the interior of the anode gradient layer to a second side edge of the anode gradient layer.

10. The back-illuminated SPAD image sensor of claim 9, wherein a depletion region within the anode gradient layer is shaped by a first area of the back edge dopant concentration gradient, a second area of the first side edge dopant concentration gradient, and a third area of the second side edge dopant concentration gradient.

11. The back-illuminated SPAD image sensor of claim 9, wherein the anode gradient layer is lightly doped with the first dopant type.

12. The back-illuminated SPAD image sensor of claim 8, wherein the lower dopant concentration in the guard ring layer produces a lower electric field at an edge of an avalanche region that is formed between the anode region and the cathode region.

13. An electronic device, comprising:

a back-illuminated single-photon avalanche diode (SPAD) image sensor, comprising;

a sensor wafer; and

a circuit wafer positioned below the sensor wafer,

wherein the sensor wafer comprises;

a first SPAD region and a second SPAD region, each SPAD region comprising;

a cathode region positioned adjacent to a front surface of the SPAD region and comprising a first dopant type;

an anode avalanche layer positioned over the cathode region and comprising a second dopant type; and

an anode gradient layer comprising the second dopant type, the anode gradient layer comprising;

 

a back edge dopant concentration gradient that extends from a back surface of the anode gradient layer;

 

a first side edge dopant concentration gradient that extends from an interior of the anode gradient layer to a first side edge of the anode gradient layer; and

 

a second side edge dopant concentration gradient that extends from the interior of the anode gradient layer to a second side edge of the anode gradient layer; and

a processing device operably connected to the back-illuminated SPAD image sensor and configured to;

receive output signals from the back-illuminated SPAD image sensor; and

determine one or more characteristics associated with a reflected light received in the SPAD image sensor based on the received output signals.

14. The electronic device of claim 13, wherein the circuit wafer comprises:

a voltage supply coupled to the first SPAD region through a first inter-wafer connector and to the second SPAD region through a second inter-wafer connector, the voltage supply configured to provide a high reverse bias voltage level to the first and second SPAD regions; and

an output circuit coupled to a respective cathode region through a third inter-wafer connector.

15. The electronic device of claim 14, wherein the voltage supply is configured to supply a high voltage to the first SPAD region through the first inter-wafer connector and to the second SPAD region through the second inter-wafer connector.

16. The electronic device of claim 13, wherein the first and the second SPAD regions each include a guard ring layer adjacent to an avalanche region that is formed between the cathode region and the anode avalanche layer, wherein the guard ring layer is doped with the first dopant type and a dopant concentration in the guard ring layer is less than a dopant concentration in the cathode region.

17. The electronic device of claim 16, wherein the cathode region and the anode avalanche layer have substantially the same area.

18. The electronic device of claim 13, wherein the anode gradient region is lightly doped with the second dopant type.

19. The electronic device of claim 13, wherein a depletion layer within the anode gradient layer is shaped by a first area of the back edge dopant concentration gradient, a second area of the first side edge dopant concentration gradient, and a third area of the second side edge dopant concentration gradient.

20. The electronic device of claim 13, the back-illuminated SPAD image sensor further comprising a deep trench isolation region between the first SPAD region and the second SPAD region, the deep trench isolation region extending from the front surface of the first and the second SPAD regions to and through a back surface of the sensor wafer.