FEEDBACK COMPENSATED OSCILLATOR

• US 20180091096A1
• Filed: 09/29/2016
• Published: 03/29/2018
• Est. Priority Date: 09/29/2016
• Status: Active Grant

• Current Assignee: Macronix International Co., Ltd.
• Original Assignee: Macronix International Co., Ltd.
• Inventors: Wu, Hsien-Hung
• Granted Patent: US 10,128,794 B2
• Time in Patent Office: Days
• CPC Class Codes: H03B 5/24 active element in amplifier being semiconductor device H03B5/26 takes precedence
• CPC Class Codes: H03B 5/26 frequency-determining element being part of bridge circuit in closed ring around which signal is transmitted; frequency-determining element being connected via a bridge circuit to such a closed ring, e.g. Wien-Bridge oscillator, parallel-T oscillator
• CPC Class Codes: H03K 3/011 Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature to maintain energy constant H03K3/015
• CPC Class Codes: H03K 3/0231 Astable circuits H03K3/0315 takes precedence
• CPC Class Codes: H03K 4/501 the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator

Abstract

An oscillator produces an oscillator output signal usable as a clock signal, otherwise as a frequency reference on an integrated circuit. The oscillator includes an RC network with a voltage-controlled element, such as a voltage-controlled resistor, voltage-controlled capacitor or a combination including a voltage-controlled resistor and voltage-controlled capacitor. Also, a tunable element having an adjustable resistance determined by a first static parameter is included in the RC network. The oscillator also includes a feedback circuit which can include a frequency-to-voltage converter. The feedback circuit generates a control signal for the voltage-controlled element. The feedback circuit includes a feedback reference circuit having a reference output determined by a second static parameter, and a loop amplifier responsive to the reference output and the oscillator output signal.

Claims

1. A clock circuit, comprising:

an oscillator that produces an oscillator output signal, the oscillator including an RC network with a voltage-controlled element, and a tunable element having an adjustable resistance based on a first static parameter; and

a feedback circuit coupled to the oscillator, which generates a control signal for the voltage-controlled element, the feedback circuit including a feedback reference circuit having a stabilized reference output, and a loop amplifier responsive to the reference output and the oscillator output signal.

2. The clock circuit of claim 1, including nonvolatile memory connected to the tunable element storing the first static parameter.

3. The clock circuit of claim 1, wherein the feedback reference circuit generates the stabilized reference output at a voltage level based on a second static parameter, and including nonvolatile memory connected to the feedback reference circuit storing the second static parameter.

4. The clock circuit of claim 3, including a non-volatile memory array on a same integrated circuit with the oscillator, the non-volatile memory array storing one or more backup copies of the first and second static parameters.

5. The clock circuit of claim 1, wherein the RC network includes switches responsive to the oscillator output signal, to alternatively charge and discharge capacitors in the RC network, where a first node in the RC network has a voltage that is a function of charge on one of the capacitors and a second node in the RC network has a voltage that is a function of charge on another one of the capacitors;

and

the oscillator includes a clock amplifier, having a signal input coupled to the first and second nodes in the RC network and an output, configured to amplify differences between the voltages on the first and second nodes and a reference, to produce the oscillator output signal.

6. The clock circuit of claim 1, wherein:

the feedback circuit includes a frequency-to-voltage converter; and

the loop amplifier includes a low pass filter having an input coupled to the frequency-to-voltage converter and an output, and an error amplifier coupled to the output of the low pass filter and to the reference output.

7. The clock circuit of claim 6, wherein the loop amplifier includes a low pass amplifier stage and an error amplifier stage, the low pass amplifier stage comprising an amplifier and an RC feedback whereby a gain and frequency response of the low pass amplifier stage are a function of passive resistors and capacitors, and the error amplifier stage comprising an amplifier with resistive feedback whereby a gain of the error amplifier stage is a function of passive resistors.

8. The clock circuit of claim 1, wherein the loop amplifier comprises an amplifier, with positive and negative inputs, configured with a resistive feedback circuit between its output and its negative input, and a resistor divider on the positive input which in combination sets a gain during normal operation, and including a circuit that increases resistance in the resistive feedback circuit and the resistor divider in a calibration mode to increase the gain.

9. The clock circuit of claim 1, wherein the loop amplifier comprises an amplifier having adjustable gain, configured to increase the gain in a calibration mode.

10. The clock circuit of claim 1, wherein the oscillator has an enabled mode and a low power mode.

11. A method for manufacturing a clock circuit, comprising:

forming an oscillator that produces an oscillator output signal, the oscillator including an RC network with a voltage-controlled element, and a tunable element having an adjustable resistance based on by a first static parameter;

forming a feedback circuit which generates a control signal for the voltage-controlled element, the feedback circuit including an adjustable feedback reference circuit having a stabilized reference output, and a loop amplifier responsive to the reference output and the oscillator output signal;

setting the first static parameter to set the oscillator output signal to a frequency matching a target frequency while applying a fixed voltage to control the voltage-controlled element and while the feedback circuit is disconnected from the oscillator output signal;

coupling the feedback circuit to the oscillator output signal while applying a fixed voltage to control the voltage-controlled element, and setting the second static parameter so that the reference output matches a target voltage; and

connecting the control signal from the feedback circuit to the voltage-controlled element.

12. The method of claim 11, including storing the first static parameter in nonvolatile memory coupled to the tunable element.

13. The method of claim 11, including setting the stabilized reference output at a voltage level based on a second static parameter, and storing the second static parameter in nonvolatile memory coupled to the to the feedback reference circuit.

14. The method of claim 13, including storing one or more backup copies of the first and second static parameters in a non-volatile memory array on a same integrated circuit with the oscillator.

15. The method of claim 11, wherein the RC network includes switches responsive to the oscillator output signal, to alternatively charge and discharge capacitors in the RC network, where a first node in the RC network has a voltage that is a function of the charge on one of the capacitors and a second node in the RC network has a voltage that is a function of another one of the capacitors;

and

the oscillator includes a clock amplifier, having a signal input coupled to the first and second nodes in the RC network, and an output configured to amplify differences between the voltages on the first and second nodes and a reference, to produce the oscillator output signal.

16. The method of claim 11, wherein:

the feedback circuit includes a frequency-to-voltage converter; and

the loop amplifier includes a low pass filter having an input coupled to the frequency-to-voltage converter and an output, and an error amplifier coupled to the output of the low pass filter and to the reference output.

17. The method of claim 16, wherein the loop amplifier includes a low pass amplifier stage and an error amplifier stage, the low pass amplifier stage comprising an operational amplifier with RC feedback, and setting a gain and frequency response of the low pass amplifier stage as a function of passive resistors and capacitors, and the error amplifier stage comprising an operational amplifier with resistive feedback and setting a gain of the error amplifier stage as a function of passive resistors.

18. The method of claim 11, wherein the loop amplifier comprises an amplifier, with positive and negative inputs, configured with a resistive feedback circuit between its output and its negative input, and a resistor divider on the positive input which in combination sets a gain during normal operation, and including increasing resistance in the resistive feedback circuit and the resistor divider in a calibration mode to increase the gain.

19. The method of claim 11, wherein the loop amplifier comprises an amplifier having adjustable gain, including setting a first gain during normal operation and a second increased gain in a calibration mode.

20. The method of claim 11, wherein the oscillator has an enabled mode and a low power mode.