MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACKED HORIZONTAL ACTIVE STRIPS WITH VERTICAL CONTROL GATES
First Claim
1. A NOR string array formed over a planar surface of a semiconductor substrate, comprising a first NOR string and a second NOR string, each NOR string comprising thin-film storage transistors formed along an active strip extending lengthwise along a first direction parallel to the planar surface, wherein the thin film storage transistors in each NOR string share a pre-charge device, a common drain terminal and a common source terminal, wherein a gate terminal of each storage transistor in the first NOR string is electrically connected to a gate terminal of a corresponding storage transistor in the second NOR string by a conductor that extends lengthwise along a second direction which is substantially perpendicular to the planar surface, and wherein the pre-charge device pre-charges the common source terminal to a voltage that is substantially held by virtue of a parasitic capacitance in the source terminal during a program, program-inhibit, reading or erasing operation on the NOR string.
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Accused Products
Abstract
Multi-gate NOR flash thin-film transistor (TFT) string arrays (“multi-gate NOR string arrays”) are organized as stacks of horizontal active strips running parallel to the surface of a silicon substrate, with the TFTs in each stack being controlled by vertical local word-lines provided along one or both sidewalls of the stack of active strips. Each active strip includes at least a channel layer formed between two shared source or drain layers. Data storage in the TFTs of an active strip is provided by charge-storage elements provided between the active strip and the control gates provided by the adjacent local word-lines. Each active strip may provide TFTs that belong to one or two NOR strings, depending on whether one or both sides of the active strip are used.
8 Citations
17 Claims
- 1. A NOR string array formed over a planar surface of a semiconductor substrate, comprising a first NOR string and a second NOR string, each NOR string comprising thin-film storage transistors formed along an active strip extending lengthwise along a first direction parallel to the planar surface, wherein the thin film storage transistors in each NOR string share a pre-charge device, a common drain terminal and a common source terminal, wherein a gate terminal of each storage transistor in the first NOR string is electrically connected to a gate terminal of a corresponding storage transistor in the second NOR string by a conductor that extends lengthwise along a second direction which is substantially perpendicular to the planar surface, and wherein the pre-charge device pre-charges the common source terminal to a voltage that is substantially held by virtue of a parasitic capacitance in the source terminal during a program, program-inhibit, reading or erasing operation on the NOR string.
Specification