SYSTEMS AND METHODS FOR INTELLIGENT CONTROL RELATED TO TRIAC DIMMERS BY USING MODULATION SIGNALS

• US 20180110104A1
• Filed: 12/08/2017
• Published: 04/19/2018
• Est. Priority Date: 10/17/2016
• Status: Active Application

• Current Assignee: Guangzhou On-Bright Electronics Co., Ltd
• Original Assignee: Guangzhou On-Bright Electronics Co., Ltd
• Inventors: Liang, Yuhao, Liao, Yimu, Chen, Zhiliang
• Granted Patent: US 10,264,642 B2
• Time in Patent Office: Days
• CPC Class Codes: H05B 45/10 Controlling the intensity of the light
• CPC Class Codes: H05B 45/31 Phase-control circuits
• CPC Class Codes: H05B 45/325 Pulse-width modulation [PWM]
• CPC Class Codes: H05B 45/327 Burst dimming
• CPC Class Codes: H05B 45/3575 by means of dummy loads or bleeder circuits, e.g. for dimmers
• CPC Class Codes: H05B 45/48 having LEDs organised in strings and incorporating parallel shunting devices
• CPC Class Codes: H05B 47/10 Controlling the light source
• CPC Class Codes: H05B 47/16 by timing means
• CPC Class Codes: Y02B 20/40 Control techniques providing energy savings, e.g. smart controller or presence detection

Abstract

System controller for a lighting system and method thereof according to certain embodiments. For example, the system controller includes a first controller terminal configured to receive a first signal and a transistor including a first transistor terminal, a second transistor terminal, and a third transistor terminal. Additionally, the system controller includes a second controller terminal coupled to the first transistor terminal, and a third controller terminal coupled to the third transistor terminal. The system controller is configured to determine whether the first signal is associated with a leading-edge TRIAC dimmer based at least in part on the first signal, the leading-edge TRIAC dimmer being configured to receive an AC input voltage associated with at least a first half cycle from a starting time to an ending time.

Claims

1. A system controller for a lighting system, the system controller comprising:

a first controller terminal configured to receive a first signal;

a transistor including a first transistor terminal, a second transistor terminal, and a third transistor terminal;

a second controller terminal coupled to the first transistor terminal; and

a third controller terminal coupled to the third transistor terminal;

wherein the system controller is configured to;

determine whether the first signal is associated with a leading-edge TRIAC dimmer based at least in part on the first signal, the leading-edge TRIAC dimmer being configured to receive an AC input voltage associated with at least a first half cycle from a starting time to an ending time;

in response to the first signal being determined to be associated with the leading-edge TRIAC dimmer, generate a drive signal; and

send the drive signal to the second transistor terminal;

wherein the system controller is further configured to;

keep the drive signal at a first logic level to turn on the transistor from a first time, the first time being the same or after the starting time;

in response to determining that the first signal satisfies a first condition, start, at a second time, modulating the drive signal by changing the drive signal between the first logic level and a second logic level to turn on and off the transistor;

keep modulating the drive signal for a first predetermined time period from the second time to a third time;

stop, at the third time, modulating the drive signal to keep the drive signal at the second logic level to turn off the transistor;

in response to determining that the first signal satisfies a second condition, start, at a fourth time, modulating the drive signal by changing the drive signal between the first logic level and the second logic level to turn on and off the transistor, the fourth time being before the ending time;

keep modulating the drive signal for a second predetermined time period from the fourth time to a fifth time; and

stop, at the fifth time, modulating the drive signal to keep the drive signal at the first logic level to turn on the transistor.

2. The system controller of claim 1 wherein the fifth time is the same as the ending time.

3-34. -34. (canceled)