COMPUTER SYSTEM AND METHOD OF OPERATING THE SAME

• US 20180137044A1
• Filed: 07/14/2017
• Published: 05/17/2018
• Est. Priority Date: 11/16/2016
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: JO, In-soon, CHO, Sang-yeun
• Granted Patent: US 10,698,807 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0238 Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 13/1694 Configuration of memory controller to different memory types
• CPC Class Codes: G06F 2212/202 Non-volatile memory
• CPC Class Codes: G06F 2212/7202 Allocation control and policies

Abstract

A computer system includes a main memory device and a processor. The main memory device includes a non-volatile memory and a memory controller to control the non-volatile memory. The processor is connected to the main memory device, executes an application program loaded to the non-volatile memory, and provides the memory controller with a command including context property information of an allocation region. The memory controller receives the command and controls the non-volatile memory based on the context property information.

Claims

1. A computer system comprising:

a main memory device including a non-volatile memory and a memory controller to control the non-volatile memory; and

a processor connected to the main memory device, the processor to execute an application program loaded to the non-volatile memory and to provide the memory controller with a command including context property information of an allocation region, wherein the memory controller is to receive the command and to control the non-volatile memory based on the context property information.

2. The computer system as claimed in claim 1, wherein:

the command is a memory allocation command including information indicating a size and the context property information of the allocation region,

the memory controller is to allocate a first allocation region in the non-volatile memory by referring to the context property information based on the memory allocation command and to return information indicating a start address of the first allocation region to the processor.

3. The computer system as claimed in claim 2, wherein:

the memory controller is to store information indicating a start address, a size, and the context property information of the first allocation region in a context property table, and

the context property table includes information indicating a start address, a size, and context property information of each allocation region.

4. The computer system as claimed in claim 3, wherein:

the context property information indicates an effective period property of each allocation region, and

the memory controller is to allocate the first allocation region physically adjacently to an allocation region that has an identical effective period property to an effective period property of the first allocation region, the memory controller to allocate the first allocation region by referring to the context property table.

7. The computer system as claimed in claim 3, wherein:

the context property information includes a sequential/non-sequential access property of each allocation region, and

when the first allocation region has a sequential access property based on the context property information, the memory controller is to allocate the first allocation region in a physically continuous region in the non-volatile memory.

9. The context property information as claimed in claim 3, wherein;

the context property information includes an expansion/non-expansion property of each allocation region, and

when the first allocation region has an expansion property based on the context property information, the memory controller is to allocate the first allocation region in a region in the non-volatile memory that is physically continuous and larger than a size to be allocated.

11. The computer system as claimed in claim 9, wherein the memory controller is to update the expansion/non-expansion property of the context property information, regarding the other regions besides the first allocation region in a region larger than the region to be allocated, to reserved property in the context property table.

12. The computer system as claimed in claim 3, wherein:

the context property information includes a valid/invalid property, and

the memory controller is to update the valid/invalid property, with respect to the first allocation region in the context property table, to valid property based on the memory allocation command.

13. The computer system as claimed in claim 12, wherein:

the processor is to provide the memory controller with a memory revoke command including information indicating a start address of an allocation region that is to be allocation-revoked, and

the memory controller is to update the valid/invalid property of the allocation region having the start address in the context property table to an invalid property based on the memory revoke command.

14. The computer system as claimed in claim 12, wherein the memory controller is to perform a wear-leveling operation on non-volatile memory regions having a valid property in the context property table.

15. The computer system as claimed in claim 1, wherein:

the main memory device includes a volatile memory to be controlled by the memory controller, and

the command is a memory allocation command including information indicating a size of an allocation region and the context property information including a speed property of the allocation region, and

the memory controller is to allocate a first allocation region to the non-volatile memory or the volatile memory based on the speed property.

17. The computer system as claimed in claim 15, wherein:

the memory controller is to store information indicating a start address and a size and the context property information of the first allocation region in a context property table, and

the context property table is stored in the volatile memory.

19. The computer system as claimed in claim 1, further comprising:

a storage to store the application program executed by the processor,

wherein the main memory device is to provide the processor with memory space to drive the application program and is to store a result of a calculation performed by the processor.

5-6. -6. (canceled)

8. (canceled)

10. (canceled)

16. (canceled)

18. (canceled)

20. A method for operating a computer system, the method comprising:

providing a command to a memory controller of a main memory device, the command including context property information of an allocation region, wherein providing the command is performed by a processor; and

receiving the command and managing a non-volatile memory of the main memory device based on the context property information, wherein receiving the command and managing the non-volatile memory are performed by the memory controller.

21. The method as claimed in claim 20, further comprising:

providing the memory controller with a memory allocation command including information indicating a size and the context property information of the allocation region, wherein providing the memory allocation command is performed by the processor; and

allocating a first allocation region in the non-volatile memory based on the context property information and returning information indicating a start address of the first allocation region to the processor, wherein allocating the first allocation region and returning the start address information are performed by the memory controller.

22. The method as claimed in claim 21, further comprising:

storing, by a memory controller, information indicating a start address and a size and the context property information of the first allocation region in a context property table in the non-volatile memory, wherein the context property table includes information indicating a start address and a size and context property information of a plurality of allocation regions.

23-30. -30. (canceled)

31. An apparatus, comprising:

an interface; and

a processor to provide a command to a memory controller of a non-volatile memory through the interface, the command including context property information of an allocation region in the non-volatile memory, the context property information indicating at least one property to control the memory controller in designating the allocation region in the non-volatile memory.

32. The apparatus as claimed in claim 31, wherein the context proper information indicates at least one of an effective period property of the allocation region, a sequential/non-sequential access property, an expansion/non-expansion property of the allocation region, a valid/invalid property of the allocation region, a security property of the allocation region, or a speed property of the allocation.

33. The apparatus as claimed in claim 31, wherein the allocation region is a region to be allocated in the non-volatile memory.

34. The apparatus as claimed in claim 31, wherein the allocation region is a region already allocated to the non-volatile memory.

35. (canceled)