REDUCING BACKGROUND CAPACITANCE ASSOCIATED WITH A TOUCH SURFACE

• US 20180143736A1
• Filed: 11/18/2016
• Published: 05/24/2018
• Est. Priority Date: 11/18/2016
• Status: Active Grant

• Current Assignee: Synaptics Incorporated
• Original Assignee: Synaptics Incorporated
• Inventors: Losh, Jonathan, Weinerth, John, Solven, Derek
• Granted Patent: US 10,338,740 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 3/0418 for error correction or compensation, e.g. based on parallax, calibration or alignment
• CPC Class Codes: G06F 3/0442 using active external devices, e.g. active pens, for transmitting changes in electrical potential to be received by the digitiser

Abstract

A processing system for reducing background capacitance associated with a touch surface. The processing system includes: transmitter circuitry that drives a transmitter electrode of the touch surface with a waveform; receiver circuitry that detects input in a sensing region of the touch surface based on a resulting signal from a receiver electrode of the touch surface; and offset reduction circuitry connected to the receiver circuitry that: subtracts, prior to completion of an integration period of the waveform, a first plurality of charge associated with background capacitance from the resulting signal using a capacitor; executes a first reload of the capacitor prior to completion of the integration period of the waveform; and subtracts, prior to completion of the integration period of the waveform, a second plurality of charge associated with background capacitance from the resulting signal using the capacitor after the first reload.

Claims

1. A processing system for reducing background capacitance associated with a touch surface, comprising:

transmitter circuitry configured to drive a transmitter electrode of the touch surface with a waveform;

receiver circuitry configured to detect input in a sensing region of the touch surface based on a resulting signal from a receiver electrode of the touch surface; and

offset reduction circuitry connected to the receiver circuitry and configured to;

subtract, prior to completion of an integration period of the waveform, a first plurality of charge associated with background capacitance from the resulting signal using a capacitor;

execute a first reload of the capacitor prior to completion of the integration period of the waveform; and

subtract, prior to completion of the integration period of the waveform, a second plurality of charge associated with background capacitance from the resulting signal using the capacitor after the first reload.

2. The processing system of claim 1, wherein the receiver circuitry comprises a charge integrator comprising an amplifier, and wherein the receiver electrode and the capacitor are coupled to an inverting terminal of the amplifier.

3. The processing system of claim 1, wherein the waveform has a peak of 9V, wherein the first reload is executed during the integration period, and wherein the second plurality of charge is subtracted during the integration period.

4. The processing system of claim 1, wherein:

the waveform is a square wave;

the offset reduction circuitry comprises a voltage driver coupled to the capacitor;

the voltage driver comprises an output with a polarity that is opposite to the square wave; and

the integration period is a half-cycle of the square wave.

5. The processing system of claim 1, wherein the offset reduction circuitry comprises a first set of switches that disconnect the capacitor from the receiver circuitry during the first reload of the capacitor.

6. The processing system of claim 5, wherein the offset reduction circuitry further comprises a second set of switches configured to:

connect a first terminal of the capacitor but not a second terminal of the capacitor to a voltage driver for the first reload; and

connect the second terminal but not the first terminal to the voltage driver for a second reload of the capacitor prior to completion of the integration period.

7. The processing system of claim 6, wherein the offset reduction circuitry further comprises a third set of switches configured to:

connect the first terminal but not the second terminal to ground to subtract the second plurality of charge; and

connect the second terminal but not the first terminal to ground to subtract the first plurality of charge.

8. The processing system of claim 2, wherein the offset reduction circuitry comprises a first switch that disconnects the capacitor from the receiver circuitry during the first reload.

9. The processing system of claim 8, wherein the offset reduction circuitry further comprises:

a set of switches that connect, during the first reload, a first terminal of the capacitor to a voltage driver and a second terminal of the capacitor to a reference voltage,

wherein the reference voltage is an input to a non-inverting terminal of the amplifier.

10. The processing system of claim 9, wherein the offset reduction circuitry further comprises:

a second switch that connects the first terminal of the capacitor to ground to subtract the first plurality of charge.

11. A method for reducing background capacitance associated with a touch surface, comprising:

driving a transmitter electrode of the touch surface with a waveform;

integrating, by receiver circuitry, a resulting signal from a receiver electrode of the touch surface;

subtracting, prior to completion of an integration period of the waveform, a first plurality of charge associated with background capacitance from the resulting signal using a capacitor;

executing a first reload of the capacitor prior to completion of the integration period of the waveform;

subtracting, prior to completion of the integration period of the waveform, a second plurality of charge associated with background capacitance from the resulting signal using the capacitor after the first reload; and

detecting input in a sensing region of the touch surface based on the resulting signal.

12. The method of claim 11, wherein the receiver circuitry comprises a charge integrator comprising an amplifier, and wherein the sensing electrode and the capacitor are coupled to an inverting terminal of the amplifier.

13. The method of claim 11, wherein:

the waveform is a square wave;

the capacitor is coupled to a voltage driver;

the voltage driver comprises an output with a polarity that is opposite to the square wave; and

the integration period is a half-cycle of the square wave.

14. The method of claim 11, wherein executing the first reload comprises:

disconnecting the capacitor from the receiver circuitry by opening a first set of switches that couple the capacitor to the receiver circuitry.

15. The method of claim 14, further comprising:

executing a second reload of the capacitor prior to completion of the integration period,

wherein executing the first reload further comprises connecting, using a second set of switches, a first terminal of the capacitor but not a second terminal of the capacitor to a voltage driver, and

wherein executing the second reload comprises connecting, using the second set of switches, the second terminal but not the first terminal to the voltage driver.

16. The method of claim 15, wherein:

subtracting the second plurality of charge comprises connecting, using a third set of switches, the first terminal but not the second terminal to ground; and

subtracting the first plurality of charge comprises connecting, using the third set of switches, the second terminal but not the first terminal to ground.

17. The method of claim 12, wherein executing the first reload comprises disconnecting, using a first switch, the capacitor from the receiver circuitry.

18. The method of claim 17, wherein executing the first reload further comprises:

connecting, using a set of switches, a first terminal of the capacitor to a voltage driver and a second terminal of the capacitor to a reference voltage,

wherein the reference voltage is an input to a non-inverting terminal of the amplifier.

19. The method of claim 18, wherein subtracting the first plurality of charge comprises:

closing a second switch that connects the first terminal of the capacitor to ground.

20. The method of claim 11, wherein the waveform has a peak of 9V, wherein the first reload is executed during the integration period, and wherein the second plurality of charge is subtracted during the integration period.