FIN FIELD-EFFECT TRANSISTOR AND FABRICATION METHOD THEREOF
First Claim
1. A method for fabricating a fin field-effect transistor (FinFET) structure, comprising:
- forming a semiconductor substrate and a plurality of fins by etching a base substrate, wherein first trenches and second trenches are formed between adjacent fins, and a width of the first trenches is greater than a width of the second trenches;
forming a first isolation layer on a surface of the semiconductor substrate exposed by the fins and on side surfaces of the fins, wherein the first isolation layer in the first trench contains an opening;
performing a first thermal annealing process on the first isolation layer;
forming a second isolation layer to fill the opening and cover the first isolation layer;
removing a partial thickness of the first isolation layer and a partial thickness of the second layer to form an isolation structure;
forming a gate structure across the plurality of fins by covering side and top surfaces of the plurality of fins; and
forming doped source/drain regions in the fins at two sides of the gate structure.
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Abstract
FinFET structures and fabrication methods thereof are provided. An exemplary fabrication method includes forming a semiconductor substrate and a plurality of fins. First trenches and second trenches are formed between adjacent fins, and a width of the first trench is greater than a width of the second trench. The method also includes forming a first isolation layer on the semiconductor substrate exposed by the fins and on side surfaces of the fins. The first isolation layer containing an opening at the first trench. Further, the method also includes performing a first thermal annealing; forming a second isolation layer to fill the opening; removing a partial thickness of the first isolation layer and a partial thickness of the second layer to form an isolation structure; forming a gate structure across the plurality of fins; and forming doped source/drain regions in the fins at two sides of the gate structure.
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Citations
20 Claims
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1. A method for fabricating a fin field-effect transistor (FinFET) structure, comprising:
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forming a semiconductor substrate and a plurality of fins by etching a base substrate, wherein first trenches and second trenches are formed between adjacent fins, and a width of the first trenches is greater than a width of the second trenches; forming a first isolation layer on a surface of the semiconductor substrate exposed by the fins and on side surfaces of the fins, wherein the first isolation layer in the first trench contains an opening; performing a first thermal annealing process on the first isolation layer; forming a second isolation layer to fill the opening and cover the first isolation layer; removing a partial thickness of the first isolation layer and a partial thickness of the second layer to form an isolation structure; forming a gate structure across the plurality of fins by covering side and top surfaces of the plurality of fins; and forming doped source/drain regions in the fins at two sides of the gate structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A fin field-effect transistor (FinFET), comprising:
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a semiconductor substrate; a plurality of fins formed on the semiconductor substrate, wherein first trenches and second trenches are formed between adjacent fins and a width of the first trench is greater than a width of the second trench; and a first isolation layer, formed on the semiconductor substrate exposed by the plurality of fins and on side surfaces of the fins, wherein the first isolation layer in the first trench contains an opening filled with a second isolation layer. - View Dependent Claims (18, 19, 20)
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Specification