TRENCH GATE IGBT

• US 20180151710A1
• Filed: 05/25/2016
• Published: 05/31/2018
• Est. Priority Date: 01/05/2016
• Status: Active Application

• Current Assignee: Zhuzhou Ccr Times Electric Co., Ltd.
• Original Assignee: Zhuzhou Ccr Times Electric Co., Ltd.
• Inventors: LIU, Guoyou, ZHU, Liheng, HUANG, Jianwei, LUO, Haihui, TAN, Canjian, YANG, Xinzhu, XIAO, Qiang, WEN, Gao
• Application Number:
  US15/579,473
• Publication Number:
  US 20180151710A1
• Time in Patent Office: Days
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0804 Emitter regions of bipolar transistors
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/417 carrying the current to be rectified, amplified or switched
• CPC Class Codes: H01L 29/41708 Emitter or collector electrodes for bipolar transistors
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/7396 with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions H01L29/7398 takes precedence
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

Abstract

Disclosed is a trench gate IGBT. A dummy gate is arranged between two real gates. An emitter metal is in contact with the dummy gate, so that an emitter metal contact area is not limited to an area between trenches. The emitter metal contact area includes an area where the emitter metal is in contact with the dummy gate, thereby enlarging the emitter metal contact area, and accordingly reducing a distance between each of the real gates and the dummy gate. Consequently, the distance between each of the real gates and the dummy gate is no longer affected by a minimum emitter contact area, and a turn-on voltage drop of the trench gate IGBT can be greatly reduced.

Claims

1. A trench gate IGBT, which comprises a semiconductor base and a first structure, wherein

the first structure comprises first trench gate structures and a second trench gate structure which are arranged at a surface interior of the semiconductor base, wherein

the second trench gate structure is arranged between two first trench gate structures;

the first trench gate structures are real gates, and the second trench gate structure is a dummy gate; and

an emitter metal is in contact with the second trench gate structure.

2. The trench gate IGBT according to claim 1, wherein the second trench gate structure comprises a first doping area, an oxide layer which covers an inner surface of a trench, and poly-Si filled in the trench, wherein

the first doping area covers the poly-Si at an upper surface of the second trench gate structure, and a doping type of the first doping area is opposite to a doping type of the semiconductor base.

3. The trench gate IGBT according to claim 1, wherein the first structure further comprises second doping areas which are arranged within the surface interior of the semiconductor base and at sides of the first trench gate structures near the second trench gate structure and have a doping type opposite to the doping type of the first doping area, wherein the second doping areas are in contact with the emitter metal.

4. The trench gate IGBT according to claim 1, wherein a first trench gate structure comprises an oxide layer which covers an inner surface and an upper surface of a trench and poly-Si filled in the trench, and a passivation layer is arranged between the first trench gate structure and the emitter metal.

5. The trench gate IGBT according to claim 2, further comprising a second structure which is adjacent to the first structure,

wherein the second structure comprises third trench gate structures and a fourth trench gate structure which are arranged at the surface interior of the semiconductor base,

wherein the fourth trench gate structure is arranged between two third trench gate structures;

the third trench gate structures are real gates, and the fourth trench gate structure is a dummy gate;

trenches of the first trench gate structures are in communication with trenches of the third trench gate structures, and a trench of the second trench gate structure is in communication with a trench of the fourth trench gate structure; and

the emitter metal is in contact with the fourth trench gate structure, and

wherein the second structure further comprises third doping areas which are arranged between each of the third gate structures and the fourth trench gate structure and have a doping type opposite to the doping type of the first doping area, and the third doping areas are in contact with the emitter metal.

6. The trench gate IGBT according to claim 5, wherein the first structure further comprises fourth doping areas which are arranged within the surface interior of the semiconductor base and between each the first trench gate structures and the second trench gate structure and have a doping type same as the doping type of the first doping area.

7. The trench gate IGBT according to claim 5, wherein a plurality of first structures and second structures are arranged, and the first structures and the second structures are arranged alternately along a direction perpendicular to a plane in which the first structures are arranged.

8. A trench gate IGBT, which comprises a semiconductor base, a first trench gate structure and second trench gate structures which are arranged within a surface interior of the semiconductor base, wherein

the first trench gate structure is arranged between two second trench gate structures;

the first trench gate structure is a real gate, and the second trench gate structures are dummy gates; and

an emitter metal is in contact with the second trench gate structures.

9. The trench gate IGBT according to claim 8, further comprising first doping areas which are arranged at sides of the first trench gate structure near the second trench gate structures and have a doping type same as a doping type of the semiconductor base, and the first doping areas are in contact with the emitter metal.

10. The trench gate IGBT according to claim 8, wherein a second trench gate structure comprises an oxide layer which covers an inner surface of a trench and poly-Si filled in the trench, and a passivation layer is arranged between the first trench gate structure and the emitter metal.