DIGITAL SILICON PHOTOMULTIPLIER FOR TOF-PET

• US 20180156926A1
• Filed: 01/02/2018
• Published: 06/07/2018
• Est. Priority Date: 04/22/2005
• Status: Active Grant

• Current Assignee: Koninklijke Philips N.V.
• Original Assignee: Koninklijke Philips N.V.
• Inventors: FRACH, Thomas, FIEDLER, Klaus
• Granted Patent: US 10,656,288 B2
• Time in Patent Office: Days
• CPC Class Codes: A61B 6/037 Emission tomography
• CPC Class Codes: G01T 1/1642 using a scintillation crystal and position sensing photodetector arrays, e.g. ANGER cameras
• CPC Class Codes: G01T 1/20184 Detector read-out circuitry, e.g. for clearing of traps, compensating for traps or compensating for direct hits
• CPC Class Codes: G01T 1/248 Silicon photomultipliers [SiPM], e.g. an avalanche photodiode [APD] array on a common Si substrate
• CPC Class Codes: G01T 1/2985 In depth localisation, e.g. using positron emitters; Tomographic imaging (longitudinal and transverse section imaging; apparatus for radiation diagnosis sequentially in different planes, steroscopic radiation diagnosis); using external radiation sources A61B6/02
• CPC Class Codes: G01T 7/005 calibration techniques stabilization of spectrometer G01T1/40
• CPC Class Codes: H04N 25/773 comprising photon counting circuits, e.g. single photon detection [SPD] or single photon avalanche diodes [SPAD]

Abstract

A radiation detector includes an array of detector pixels each including an array of detector cells. Each detector cell includes a photodiode biased in a breakdown region and digital circuitry coupled with the photodiode and configured to output a first digital value in a quiescent state and a second digital value responsive to photon detection by the photodiode. Digital triggering circuitry is configured to output a trigger signal indicative of a start of an integration time period responsive to a selected number of one or more of the detector cells transitioning from the first digital value to the second digital value. Readout digital circuitry accumulates a count of a number of transitions of detector cells of the array of detector cells from the first digital state to the second digital state over the integration time period.

Claims

1. A radiation detector comprising:

a scintillator; and

an array of detector pixels disposed monolithically on a common silicon substrate and arranged to receive bursts of light produced by the scintillator in response to received radiation, wherein each detector pixel includes;

an array of detector cells, each detector cell including a photodiode biased in a breakdown region and digital circuitry coupled with the photodiode, the digital circuitry being configured to output a first digital value in a quiescent state and a second digital value responsive to detection of a photon by the photodiode;

digital triggering circuitry configured to output a trigger signal indicative of a start of an integration time period responsive to a selected number of one or more of the detector cells transitioning from the first digital value to the second digital value; and

readout digital circuitry that accumulates a count of a number of transitions of detector cells of the array of detector cells from outputting the first digital value to outputting the second digital value over the integration time period.

2. The radiation detector as set forth in claim 1 wherein (i) the photodiodes of the array of detector cells define a photodiode layer, and (ii) the digital circuitry, digital triggering circuitry, and readout digital circuitry define a digital circuitry layer separate from and electrically coupled with the photodiode layer.

3. The radiation detector as set forth in claim 1 wherein (i) the photodiodes of the array of detector cells define a photodiode layer, and (ii) the digital circuitry, digital triggering circuitry, and readout digital circuitry are disposed in the photodiode layer interspersed amongst the photodiodes.

4. The radiation detector as set forth in claim 1 wherein the digital circuitry, digital triggering circuitry, and readout digital circuitry are CMOS circuitry.

5. The radiation detector as set forth in claim 1 further including:

multiplexing circuitry also disposed monolithically on the common silicon substrate, the multiplexing circuitry digitally multiplexing counts produced by the readout digital circuitry of the detector pixels to generate a digital radiation detector output signal.

6. The radiation detector as set forth in claim 1 wherein the detector pixels do not include analog photodiode current summing circuitry.

7. The radiation detector as set forth in claim 1 further comprising:

a planar light pipe interposed between the scintillator and the array of detector pixels.

8. The radiation detector as set forth in claim 7 further comprising:

a reflective coating encasing the scintillator and the planar light pipe and arranged to direct scintillation light toward the array of detector pixels.

9. The radiation detector as set forth in claim 1 wherein the scintillator is divided into scintillator tiles with each detector pixel optically coupled with a single scintillator tile.

10. The radiation detector as set forth in claim 9 wherein each scintillator tile includes a reflective coating arranged to channel scintillation photons to the optically coupled single detector pixel.

11. A positron emission tomography (PET) scanner comprising:

a plurality of radiation detectors as set forth in claim 1 arranged as one or more rings of detectors surrounding an imaging region; and

pair detection circuitry configured to process radiation detection events from the plurality of radiation detectors using an energy filtering window and a time filtering interval to identify pairs of substantially simultaneous 511 keV gamma ray detections.

12. A positron emission tomography (PET) scanner comprising:

a plurality of radiation detectors arranged as one or more rings of detectors surrounding an imaging region and comprising scintillators and digital detector pixels arranged to detect scintillation events produced by the scintillators in response to gamma rays striking the scintillators, wherein each digital detector pixel includes;

an array of detector cells, each detector cell including a photodiode biased in a breakdown region; and

digital triggering and readout circuitry configured to output a digital representation of a count of photons detected by the array of detector cells in response to the scintillation event and a digital representation of a timestamp indicative of when the scintillation event was detected by the digital detector pixel; and

pair detection circuitry configured to process detected scintillation events from the plurality of radiation detectors using energy filtering and time filtering to identify pairs of substantially simultaneous 511 keV gamma ray detections.

13. The PET scanner of claim 12 wherein the scintillator is divided into scintillator tiles with each digital detector pixel optically coupled with a single scintillator tile.

14. The PET scanner of claim 13 wherein each scintillator tile includes a reflective coating arranged to channel scintillation photons to the optically coupled single digital detector pixel.

15. The PET scanner of claim 14 wherein:

each digital detector pixel further includes a planar light pipe interposed between the scintillator tile and the optically coupled single digital detector pixel, and

the reflective coating encases the scintillator tile and the planar light pipe to channel scintillation photons to the optically coupled single digital detector pixel.

16. The PET scanner of claim 12 wherein the digital detector pixels comprise CMOS digital detector pixels disposed on a silicon substrate.

17. The PET scanner of claim 16 wherein:

the photodiodes of the array of detector cells define a photodiode layer, and

the digital triggering and readout circuitry define a digital circuitry layer separate from and electrically coupled with the photodiode layer.

18. The PET scanner of claim 16 wherein:

the photodiodes of the array of detector cells define a photodiode layer, and

the digital triggering and readout circuitry is disposed in the photodiode layer interspersed amongst the photodiodes.

19. The PET scanner of claim 12 wherein the digital detector pixels do not include analog photodiode current summing circuitry.

20. A positron emission tomography (PET) scanner comprising:

a plurality of radiation detectors arranged as one or more rings of detectors surrounding an imaging region and comprising scintillators and digital detector pixels arranged to detect scintillation events produced by the scintillators in response to gamma rays striking the scintillators, wherein the digital detector pixels are configured to output digital representations of counts of photons detected by the digital detector pixels in response to scintillation events and digital representations of timestamps indicative of when scintillation events were detected by the digital detector pixels; and

pair detection circuitry configured to process detected scintillation events from the plurality of radiation detectors using energy filtering and time filtering to identify pairs of substantially simultaneous 511 keV gamma ray detections.

21. The PET scanner of claim 20 wherein the digital detector pixels do not include analog photodiode current summing circuitry.

22. The PET scanner of claim 20 wherein the scintillators are divided into scintillator tiles each optically coupled with a single digital detector pixel and having a reflective coating encasing the scintillator tile to channel scintillation photons to the optically coupled single digital detector pixel.