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MULTI-CHIP PACKAGE CAPABLE OF TESTING INTERNAL SIGNAL LINES

  • US 20180158799A1
  • Filed: 07/21/2017
  • Published: 06/07/2018
  • Est. Priority Date: 12/06/2016
  • Status: Active Grant
First Claim
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1. A multi-chip package comprising:

  • a printed circuit board;

    a first semiconductor chip on the printed circuit board, the first semiconductor chip including a test circuit; and

    second semiconductor chips on the printed circuit board, the second semiconductor chips electrically connected to the first semiconductor chip via a plurality of internal signal lines,wherein the test circuit is configured to enable circuits of the first semiconductor chip connected to pads contacting the plurality of internal signal lines, transmit complementary data to at least two pads from among the pads, and form a current path in the circuits connected to the at least two pads.

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