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MEMORY DEVICE AND METHODS FOR CONTROLLING A MEMORY ASSIST FUNCTION

  • US 20180174640A1
  • Filed: 12/20/2017
  • Published: 06/21/2018
  • Est. Priority Date: 12/20/2016
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • a memory array comprising a plurality of memory cells wherein each memory cell is coupled to a control line;

    An memory assist circuit configured to, when activated, apply a reduction of a voltage of the control line;

    a signal generator configured to generate a first signal representing at least one of a process corner of the memory device, a supply voltage of the memory device, a temperature of the memory device and an aging of the memory device;

    a signal processing circuit configured to amplify the first signal; and

    a controller configured to activate the memory assist circuit based the amplified first signal.

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