METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH MULTI SPACERS
First Claim
Patent Images
1. A method for manufacturing a semiconductor structure, comprising:
- forming a fin structure over a substrate;
forming a gate structure across the fin structure;
forming a bottom spacer over a lower part of a sidewall of the gate structure;
forming a dummy spacer layer over an upper part of the sidewall of the gate structure;
removing at least a portion of the dummy spacer layer to form a gap exposing the upper part of the sidewall of the gate structure; and
forming an upper spacer in the gap.
0 Assignments
0 Petitions
Accused Products
Abstract
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a fin structure formed over a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes a bottom spacer formed on a lower part of a sidewall of the gate structure and an upper spacer formed on an upper part of the sidewall of the gate structure. In addition, the upper spacer includes an air gap formed in a dielectric material.
-
Citations
20 Claims
-
1. A method for manufacturing a semiconductor structure, comprising:
-
forming a fin structure over a substrate; forming a gate structure across the fin structure; forming a bottom spacer over a lower part of a sidewall of the gate structure; forming a dummy spacer layer over an upper part of the sidewall of the gate structure; removing at least a portion of the dummy spacer layer to form a gap exposing the upper part of the sidewall of the gate structure; and forming an upper spacer in the gap. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A method for manufacturing a semiconductor structure, comprising:
-
forming a fin structure over a substrate; forming an isolation structure around the fin structure; forming a gate structure across the fin structure and over the isolation structure; forming a bottom spacer over a lower part of a sidewall of the gate structure; forming a dummy spacer layer having a first portion over an upper part of the sidewall of the gate structure and a second portion extending along a top surface of the isolation structure; forming an interlayer dielectric layer covering the first portion and the second portion of the dummy spacer layer; and replacing the first portion of the dummy spacer layer with an upper spacer. - View Dependent Claims (9, 10, 11, 12, 13, 14)
-
-
15. A method for manufacturing a semiconductor structure, comprising:
-
forming a fin structure over a substrate; forming an isolation structure around the fin structure; forming a gate structure across the fin structure; forming a bottom spacer over a lower part of a sidewall of the gate structure and a bottom interlayer dielectric layer around the bottom spacer; forming a dummy spacer layer having a first portion over an upper part of the sidewall of the gate structure and a second portion over the bottom interlayer dielectric layer; forming an upper interlayer dielectric layer over the second portion of the dummy spacer layer; and replacing the first portion of the dummy spacer layer with an upper spacer. - View Dependent Claims (16, 17, 18, 19, 20)
-
Specification