DISPLAY DEVICE AND UNIT REGISTER CIRCUIT

• US 20180181243A1
• Filed: 12/20/2017
• Published: 06/28/2018
• Est. Priority Date: 12/27/2016
• Status: Active Grant

• Current Assignee: Japan Display Incorporated
• Original Assignee: Japan Display Incorporated
• Inventors: Tsunashima, Takanori
• Granted Patent: US 10,452,183 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/04184 Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/0291 Details of output amplifiers or buffers arranged for use in a driving circuit
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3666 with the matrix divided into sections
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence

Abstract

According to one embodiment, a display device equipped with a touch detection function includes scanning lines, and series-connected unit register circuits, wherein a touch detection operation is performed in a scan stop period, each of the unit register circuits is composed of single-channel transistors, holds and outputs a scanning signal when a voltage leak of a held signal is equal to or lower than a predetermined value, a dummy unit register circuit is provided between a previous unit register circuit which drives a last scanning line before start of the scan stop period and a subsequent unit register circuit which drives a first scanning line after end of the scan stop period, and the dummy unit register circuit continues outputting the scanning signal to the subsequent unit register circuit during the scan stop period.

Claims

1. A display device equipped with a touch detection function, comprising:

a plurality of display elements disposed in a matrix;

a plurality of scanning lines disposed along rows in which the display elements are aligned;

a plurality of signal lines disposed along columns in which the display elements are aligned;

a plurality of switching elements disposed near positions at which the scanning lines and the signal lines intersect; and

a plurality of series-connected unit register circuits sequentially outputting scanning signals which set the switching elements connected to the respective scanning lines to be active,

wherein

a touch detection operation is performed in a scan stop period in which outputting the scanning signals to the scanning lines is stopped,

each of the unit register circuits is composed of single-channel transistors, holds the scanning signal output from a previous unit register circuit in an internal circuit, and outputs the scanning signal in a case where a voltage leak of the held signal is equal to or lower than a predetermined value when a predetermined clock signal is input from outside,

a dummy unit register circuit which does not drive the scanning line is provided between the unit register circuit at a previous stage which drives a last scanning line before start of the scan stop period and the unit register circuit at a subsequent stage which drives a first scanning line after end of the scan stop period, and

the dummy unit register circuit continues outputting the scanning signal to the unit register circuit at the subsequent stage during the scan stop period.

2. The display device according to claim 1, wherein

the unit register circuit at the subsequent stage comprises a switch which switches input of the scanning signal output from the dummy unit register circuit to the inner circuit.

3. The display device according to claim 2, wherein

the single-channel transistor is a pMOS transistor or an nMOS transistor.

4. The display device according to claim 2, wherein

the single-channel transistor is composed of an organic semiconductor or an oxide semiconductor.

5. The display device according to claim 2, wherein

the transistor constituting the internal circuit is a depression-type single-channel nMOS transistor, and

an electric potential of the clock signal and an electric potential of the scanning signal are set such that when the transistor constituting the internal circuit is turned off, an electric potential supplied to a gate terminal is made smaller than an electric potential supplied to a source terminal and leak from the transistor is reduced.

6. The display device according to claim 1, wherein

input of the scanning signal output from the dummy unit register circuit to the internal circuit of the unit register circuit at the subsequent stage is performed before the scars stop period is ended and at timing at which a potential variation caused by leak of the scanning signal is equal to or smaller than a predetermined value.

7. The display device according to claim 6, wherein

the single-channel transistor is a pMOS transistor or an nMOS transistor.

8. The display device according to claim 6, wherein

the single-channel transistor is composed of an organic semiconductor or an oxide semiconductor.

9. The display device according to claim 6, wherein

the transistor constituting the internal circuit is a depression-type single-channel nMOS transistor, and

an electric potential of the clock signal and an electric potential of the scanning signal are set such that when the transistor constituting the internal circuit is turned off, an electric potential supplied to a gate terminal is made smaller than an electric potential supplied to a source terminal and leak from the transistor is reduced.

10. The display device according to claim 1, wherein

the single-channel transistor is a pMOS transistor or an nMOS transistor.

11. The display device according to claim 10, wherein

the transistor constituting the internal circuit is a depression-type single-channel nMOS transistor, and

an electric potential of the clock signal and an electric potential of the scanning signal are set such that when the transistor constituting the internal circuit is turned off, an electric potential supplied to a gate terminal is made smaller than an electric potential supplied to a source terminal and leak from the transistor is reduced.

12. The display device according to claim 1, wherein

the single-channel transistor is composed of an organic semiconductor or an oxide semiconductor.

13. The display device according to claim 12, wherein

the transistor constituting the internal circuit is a depression-type single-channel nMOS transistor, and

an electric potential of the clock signal and an electric potential of the scanning signal are set such that when the transistor constituting the internal circuit is turned off, an electric potential supplied to a gate terminal is made smaller than an electric potential supplied to a source terminal and leak from the transistor is reduced.

14. The display device according to claim 1, wherein

the transistor constituting the internal circuit is a depression-type single-channel nMOS transistor, and

an electric potential of the clock signal and an electric potential of the scanning signal are set such that when the transistor constituting the internal circuit is turned off, an electric potential supplied to a gate terminal is made smaller than an electric potential supplied to a source terminal and leak from the transistor is reduced.

15. A display device equipped with a touch detection function, comprising:

a plurality of display elements disposed in a matrix;

a plurality of scanning lines disposed along rows in which the display elements are aligned;

a plurality of signal lines disposed along columns in which the display elements are aligned;

a plurality of switching elements disposed near positions at which the scanning lines and the signal lines intersect; and

a plurality of series-connected unit register circuits sequentially outputting scanning signals which set the switching elements connected to the respective scanning lines to be active,

wherein

a touch detection operation is performed in a scan stop period in which outputting the scanning signals to the scanning lines is stopped,

each of the unit register circuits is composed of single-channel transistors, holds the scanning signal output from a previous unit register circuit in an internal circuit, and outputs the scanning signal in a case where a voltage leak of the held signal is equal to or lower than a predetermined value when a predetermined clock signal is input from outside,

first and second dummy unit register circuits which do not drive the scanning lines are provided between the unit register circuit at a previous stage which drives a last scanning line before start of the scan stop period and the unit register circuit at a subsequent stage which drives a first scanning line after end of the scan stop period,

the first dummy unit register circuit continues outputting the scanning signal to the second dummy unit register circuit during the scan stop period, and

input of the scanning signal output from the first dummy unit register circuit to the internal circuit of the second dummy unit register circuit is performed before the scan stop period is ended and at timing at which a potential variation caused by leak of the scanning signal is equal to or smaller than a predetermined value.

16. The display device according to claim 15, wherein

the second dummy unit register circuit comprises a switch which switches input of the scanning signal output from the first dummy unit register circuit to the inner circuit.

17. The display device according to claim 16, wherein

the single-channel transistor is composed of an organic semiconductor or an oxide semiconductor.

18. A unit register circuit provided in a display device equipped with a touch detection function,

the display device comprising:

a plurality of display elements disposed in a matrix;

a plurality of scanning lines disposed along rows in which the display elements are aligned;

a plurality of signal lines disposed along columns in which the display elements are aligned; and

a plurality of switching elements disposed near positions at which the scanning lines and the signal lines intersect,

the unit register circuit comprising;

a plurality of single-channel transistors,

wherein

a plurality of series-connected unit register circuits sequentially output scanning signals which set the switching elements connected to the respective scanning lines to be active,

a touch detection operation is performed in a scan stop period in which output Ling the scanning signals to the scanning lines is stopped,

each of the unit register circuits is composed of single-channel transistors, holds the scanning signal output from a previous unit register circuit in an internal circuit, and outputs the scanning signal in a case where a voltage leak of the held signal is equal to or lower than a predetermined value when a predetermined clock signal is input from outside,

a dummy unit register circuit which does not drive the scanning line is provided between the unit register circuit at a previous stage which drives a last scanning line before start of the scan stop period and the unit register circuit at a subsequent stags which drives a first scanning line after end of the scan stop period, and

the dummy unit register circuit continues outputting the scanning signal to the unit register circuit at the subsequent stage during the scan stop period.