DUAL COMMUNICATION FREQUENCY RFID CIRCUIT EQUIPPED WITH A TAMPER-EVIDENT LOOP
First Claim
1. A dual communication frequency RFID circuit, comprising a logic unit for processing data signals received or transmitted at a first frequency by a first antenna or at a second frequency by a second antenna, the first communication frequency being lower than the second communication frequency, the logic unit being connected to a unit for managing the state of a tamper loop linked to the integrated circuit by two connection terminals,wherein the management unit comprises at least one first low-pass filter linked to a first connection terminal, at least one second low-pass filter linked to a second connection terminal, a current source for supplying a current through the first low-pass filter, a switch linked at the output of the second low-pass filter, and a first inverter connected between the current source and the first low-pass filter for supplying an output signal for the state of the tamper loop to the logic unit.
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Accused Products
Abstract
A dual communication frequency RFID circuit includes a logic unit for processing data signals received or transmitted at a first frequency by a first antenna or at a second frequency by a second antenna, and a unit for managing the state of a tamper loop linked to the integrated circuit by two connection terminals. The management unit includes a first low-pass filter linked to a first connection terminal, a second low-pass filter linked to a second connection terminal, a current source for supplying a current through the first low-pass filter, a switch linked at the output of the second low-pass filter, and a first inverter connected between the current source and the first low-pass filter for supplying an output signal for the state of the tamper loop to the logic unit.
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Citations
15 Claims
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1. A dual communication frequency RFID circuit, comprising a logic unit for processing data signals received or transmitted at a first frequency by a first antenna or at a second frequency by a second antenna, the first communication frequency being lower than the second communication frequency, the logic unit being connected to a unit for managing the state of a tamper loop linked to the integrated circuit by two connection terminals,
wherein the management unit comprises at least one first low-pass filter linked to a first connection terminal, at least one second low-pass filter linked to a second connection terminal, a current source for supplying a current through the first low-pass filter, a switch linked at the output of the second low-pass filter, and a first inverter connected between the current source and the first low-pass filter for supplying an output signal for the state of the tamper loop to the logic unit.
Specification