NEUROMORPHIC COMPUTER WITH RECONFIGURABLE MEMORY MAPPING FOR VARIOUS NEURAL NETWORK TOPOLOGIES
First Claim
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1. A processor comprising:
- a memory to store a plurality of synapse weights of a neural network;
at least one neuron core comprising logic associated with a plurality of neurons;
a synapse memory mapping engine to;
receive a selection of a neural network topology type;
identify a synapse memory mapping scheme for the selected neural network topology type from a plurality of synapse memory mapping schemes that are each associated with a respective neural network topology type; and
map the plurality of synapse weights to locations in the memory based on the identified synapse memory mapping scheme.
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Abstract
In one embodiment, a method comprises receiving a selection of a neural network topology type; identifying a synapse memory mapping scheme for the selected neural network topology type from a plurality of synapse memory mapping schemes that are each associated with a respective neural network topology type; and mapping a plurality of synapse weights to locations in a memory based on the identified synapse memory mapping scheme.
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Citations
25 Claims
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1. A processor comprising:
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a memory to store a plurality of synapse weights of a neural network; at least one neuron core comprising logic associated with a plurality of neurons; a synapse memory mapping engine to; receive a selection of a neural network topology type; identify a synapse memory mapping scheme for the selected neural network topology type from a plurality of synapse memory mapping schemes that are each associated with a respective neural network topology type; and map the plurality of synapse weights to locations in the memory based on the identified synapse memory mapping scheme. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method comprising:
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receiving a selection of a neural network topology type; identifying a synapse memory mapping scheme for the selected neural network topology type from a plurality of synapse memory mapping schemes that are each associated with a respective neural network topology type; and mapping a plurality of synapse weights to locations in a memory based on the identified synapse memory mapping scheme. - View Dependent Claims (12, 13, 14, 15)
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16. A non-transitory machine readable storage medium having instructions stored thereon, the instructions when executed by a machine to cause the machine to:
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receive a selection of a neural network topology type; identify a synapse memory mapping scheme for the selected neural network topology type from a plurality of synapse memory mapping schemes that are each associated with a respective neural network topology type; and map a plurality of synapse weights to locations in a memory based on the identified synapse memory mapping scheme. - View Dependent Claims (17, 18, 19, 20)
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21. A system comprising:
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a neuromorphic processor comprising; a memory to store a plurality of synapse weights of a neural network; and logic to implement a plurality of neurons of the neural network; an input/output interface; and a synapse memory mapping engine to; receive a selection of a neural network topology type, the selection to be received via the input/output interface; identify a synapse memory mapping scheme for the selected neural network topology type from a plurality of synapse memory mapping schemes that are each associated with a respective neural network topology type; and map the plurality of synapse weights to locations in the memory based on the identified synapse memory mapping scheme. - View Dependent Claims (22, 23, 24, 25)
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Specification