METHOD AND STRUCTURE FOR PROTECTING GATES DURING EPITAXIAL GROWTH
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Accused Products
Abstract
Embodiments of the present invention provide methods and structures for protecting gates during epitaxial growth. An inner spacer of a first material is deposited adjacent a transistor gate. An outer spacer of a different material is deposited adjacent the inner spacer. Stressor cavities are formed adjacent the transistor gate. The inner spacer is recessed, forming a divot. The divot is filled with a material to protect the transistor gate. The stressor cavities are then filled. As the gate is safely protected, unwanted epitaxial growth (“mouse ears”) on the transistor gate is prevented.
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Citations
20 Claims
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1-5. -5. (canceled)
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6. A semiconductor structure, comprising:
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a semiconductor substrate; a transistor gate disposed on the semiconductor substrate; a lower inner spacer disposed adjacent to a lower portion of the transistor gate; an upper inner spacer disposed adjacent to an upper portion of the transistor gate and in contact with the lower inner spacer; and an outer spacer disposed adjacent to the lower inner spacer and the upper inner spacer. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A semiconductor structure, comprising:
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a semiconductor substrate; a first transistor gate and a second transistor gate disposed on the semiconductor substrate; a full inner spacer disposed adjacent to the first transistor gate; an outer spacer disposed adjacent to the full inner spacer; a lower inner spacer disposed adjacent to a lower portion of the second transistor gate; an upper inner spacer disposed adjacent to an upper portion of the second transistor gate and in contact with the lower inner spacer; and an outer spacer disposed adjacent to the lower inner spacer and upper inner spacer of the second transistor gate. - View Dependent Claims (17, 18, 19, 20)
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Specification