SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

• US 20180197889A1
• Filed: 03/05/2018
• Published: 07/12/2018
• Est. Priority Date: 08/31/2015
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Kato, Kiyoshi, Yakubo, Yuto, Nagatsuka, Shuhei
• Granted Patent: US 10,446,583 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 2223/54453 for use prior to dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

To provide a semiconductor device that is not easily damaged by ESD in a manufacturing process thereof. A layer whose band gap is greater than or equal to 2.5 eV and less than or equal to 4.2 eV, preferably greater than or equal to 2.7 eV and less than or equal to 3.5 eV is provided to overlap with a dicing line. A layer whose band gap is greater than or equal to 2.5 eV and less than or equal to 4.2 eV, preferably greater than or equal to 2.7 eV and less than or equal to 3.5 eV is provided around the semiconductor device such as a transistor. The layer may be in a floating state or may be supplied with a specific potential.

Claims

1. An electronic component comprising:

a chip comprising;

a circuit region surrounded by an end portion of the chip; and

a guard layer positioned along with the end portion of the chip,

wherein the circuit region comprises a first transistor and a second transistor, and

wherein the guard layer comprises a first material having a band gap greater than or equal to 2.5 eV and less than or equal to 4.2 eV.

2. The electronic component according to claim 1, wherein the first material of the guard layer has a band gap greater than or equal to 2.7 eV and less than or equal to 3.5 eV.

3. The electronic component according to claim 1, wherein the first material of the guard layer is an oxide semiconductor.

4. The electronic component according to claim 1,

wherein the first material of the guard layer is same as a first material in a channel formation region of the first transistor, and

wherein a concentration of an impurity element in the first material of the guard layer is higher than the first material in the channel formation region of the first transistor.

5. The electronic component according to claim 4, wherein the guard layer has a low resistance than the channel formation region of the first transistor.

6. The electronic component according to claim 4, wherein the impurity element is any of hydrogen, carbon, silicon, iron, nickel and argon.

7. The electronic component according to claim 1, further comprising a lead frame electrically connected to the chip.

8. The electronic component according to claim 1, wherein the chip is sealed with a resin.

9. The electronic component according to claim 1, wherein the chip is sealed with an epoxy-based resin.

10. The electronic component according to claim 1,

wherein the guard layer comprises a first layer and a second layer over the first layer,

wherein the first layer comprises the first material,

wherein the second layer comprises a second material, and

wherein a band gap of the first material of the guard layer is wider than a band gap of the second material of the guard layer.

11. The electronic component according to claim 4,

wherein the channel formation region comprises:

a first semiconductor layer comprising the first material;

a second semiconductor layer over the first semiconductor layer, the second semiconductor layer comprising a second material; and

a third semiconductor layer over the second semiconductor layer, the third semiconductor layer comprising a third material,

wherein a band gap of the first material of the channel formation region is wider than a band gap of the second material of the channel formation region, and

wherein a band gap of the third material of the channel formation region is wider than a band gap of the second material of the channel formation region.

12. The electronic component according to claim 11,

wherein the guard layer comprises:

a first layer comprising the first material; and

a second layer over the first layer, the second layer comprising a second material,

wherein the first material of the guard layer is same as the first material of the channel formation region, and

wherein the second material of the guard layer is same as the second material of the channel formation region.

13. The electronic component according to claim 1, wherein a band gap of a semiconductor layer of the first transistor is different from a band gap of a semiconductor layer of the second transistor.

14. An electronic device comprising:

the electronic component according to claim 1; and

another electronic component electrically connected to the electronic component according to claim 1.

15. A semiconductor device comprising:

a first electronic component comprising;

an element substrate;

a circuit region over the element substrate, the circuit region surrounded by an end portion of the element substrate;

a guard layer positioned along with the end portion of the element substrate; and

a lead electrically connected to the circuit region through a wire; and

a second electronic component electrically connected to the first electronic component through the lead,

wherein the circuit region comprises a first transistor and a second transistor, and

wherein the guard layer comprises a first material having a band gap greater than or equal to 2.5 eV and less than or equal to 4.2 eV.

16. The semiconductor device according to claim 15,

wherein the guard layer comprises a first layer and a second layer over the first layer,

wherein the first layer comprises the first material,

wherein the second layer comprises a second material, and

wherein a band gap of the first material of the guard layer is wider than a band gap of the second material of the guard layer.

17. The semiconductor device according to claim 15,

wherein the first material of the guard layer is same as a first material in a channel formation region of the first transistor, and

wherein a concentration of an impurity element in the first material of the guard layer is higher than the first material in the channel formation region of the first transistor.

18. The semiconductor device according to claim 17,

wherein the channel formation region comprises:

a first semiconductor layer comprising the first material;

a second semiconductor layer over the first semiconductor layer, the second semiconductor layer comprising a second material; and

a third semiconductor layer over the second semiconductor layer, the third semiconductor layer comprising a third material,

wherein a band gap of the first material of the channel formation region is wider than a band gap of the second material of the channel formation region, and

wherein a band gap of the third material of the channel formation region is wider than a band gap of the second material of the channel formation region.

19. The semiconductor device according to claim 15, wherein the element substrate is sealed with a resin.

20. An electronic device comprising:

the semiconductor device according to claim 15; and

an input/output device.