IDENTIFYING PROCESSOR ATTRIBUTES BASED ON DETECTING A GUARDED STORAGE EVENT

• US 20180203620A1
• Filed: 01/19/2017
• Published: 07/19/2018
• Est. Priority Date: 01/19/2017
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Greiner, Dan F., Jacobi, Christian, Mitran, Marcel, Paprotski, Volodymyr, Saporito, Anthony, Slegel, Timothy J.
• Granted Patent: US 10,452,288 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0269 Incremental or concurrent garbage collection, e.g. in real-time systems G06F12/0261 takes precedence
• CPC Class Codes: G06F 12/1441 for a range
• CPC Class Codes: G06F 2212/1024 Latency reduction
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 9/467 Transactional memory G06F9/528 takes precedence

Abstract

A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.

Claims

1. A computer program product for facilitating processing in a computing environment, said computer program product comprising:

a computer readable storage medium readable by a processing circuit and storing instructions for performing a method comprising;

obtaining, based on detecting a guarded storage event, one or more attributes to be used in processing the guarded storage event, the guarded storage event comprising an attempt to access a guarded area of memory; and

processing the guarded storage event using the one or more attributes.

2. The computer program product of claim 1, wherein the obtaining comprises determining a location of the one or more attributes.

3. The computer program product of claim 2, wherein the location is specified in a register loaded by an instruction, the instruction loading an address in the register of a parameter list in memory that includes the one or more attributes.

4. The computer program product of claim 1, wherein the one or more attributes include a location of a guarded storage event handler and processor status at a time of the guarded storage event.

5. The computer program product of claim 4, wherein the processor status includes at least one status selected from a group of status consisting of:

addressing mode, cause indication, access information, instruction address, operand address, an intermediate result and a return address.

6. The computer program product of claim 5, wherein the cause indication comprises one of a load guarded instruction or a load logical and shift guarded instruction that caused the guarded storage event.

7. The computer program product of claim 4, wherein the location of the guarded storage event handler is program specified, and the processor status is set by a processor executing an instruction that resulted in the guarded storage event.

8. The computer program product of claim 1, wherein the processing the guarded storage event comprises:

determining, using at least one attribute of the one or more attributes, a cause of the guarded storage event; and

branching to a selected instruction to process the guarded storage event.

9. The computer program product of claim 8, wherein the determining comprises checking one or more fields of a register storing the one or more attributes to determine the cause.

10. A computer system for facilitating processing in a computing environment, said computer system comprising:

a memory; and

a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising;

obtaining, based on detecting a guarded storage event, one or more attributes to be used in processing the guarded storage event, the guarded storage event comprising an attempt to access a guarded area of memory; and

processing the guarded storage event using the one or more attributes.

11. The computer system of claim 10, wherein the obtaining comprises determining a location of the one or more attributes, wherein the location is specified in a register loaded by an instruction, the instruction loading an address in the register of a parameter list in memory that includes the one or more attributes.

12. The computer system of claim 10, wherein the one or more attributes include a location of a guarded storage event handler and processor status at a time of the guarded storage event.

13. The computer system of claim 12, wherein the processor status includes at least one status selected from a group of status consisting of:

addressing mode, cause indication, access information, instruction address, operand address, an intermediate result and a return address.

14. The computer system of claim 12, wherein the location of the guarded storage event handler is program specified, and the processor status is set by a processor executing an instruction that resulted in the guarded storage event.

15. The computer system of claim 10, wherein the processing the guarded storage event comprises:

determining, using at least one attribute of the one or more attributes, a cause of the guarded storage event; and

branching to a selected instruction to process the guarded storage event.

16. A computer-implemented method of facilitating processing in a computing environment, said computer-implemented method comprising:

obtaining, based on detecting a guarded storage event, one or more attributes to be used in processing the guarded storage event, the guarded storage event comprising an attempt to access a guarded area of memory; and

processing, by at least one processor, the guarded storage event using the one or more attributes.

17. The computer-implemented method of claim 16, wherein the obtaining comprises determining a location of the one or more attributes, wherein the location is specified in a register loaded by an instruction, the instruction loading an address in the register of a parameter list in memory that includes the one or more attributes.

18. The computer-implemented method of claim 16, wherein the one or more attributes include a location of a guarded storage event handler and processor status at a time of the guarded storage event.

19. The computer-implemented method of claim 18, wherein the processor status includes at least one status selected from a group of status consisting of:

addressing mode, cause indication, access information, instruction address, operand address, an intermediate result and a return address.

20. The computer-implemented method of claim 16, wherein the processing the guarded storage event comprises:

determining, using at least one attribute of the one or more attributes, a cause of the guarded storage event; and

branching to a selected instruction to process the guarded storage event.