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Three-Dimensional Vertical One-Time-Programmable Memory Comprising Multiple Antifuse Sub-Layers

  • US 20180204844A1
  • Filed: 03/13/2018
  • Published: 07/19/2018
  • Est. Priority Date: 04/16/2016
  • Status: Active Grant
First Claim
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1. 1A three-dimensional vertical one-time-programmable memory (3D-OTPV), comprising:

  • a semiconductor substrate comprising a substrate circuit;

    a plurality of vertically stacked horizontal address lines above said semiconductor circuit;

    a plurality of memory holes through said horizontal address lines;

    an antifuse layer on the sidewalls of said memory holes, said antifuse layer comprising at least first and second sub-layers, wherein said first and second sub-layers comprise different antifuse materials;

    a plurality of vertical address lines in said memory holes;

    a plurality of OTP cells at the intersections of said horizontal address lines and said vertical address lines.

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