FLIP CHIP LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME

• US 20180212105A1
• Filed: 06/27/2017
• Published: 07/26/2018
• Est. Priority Date: 01/20/2017
• Status: Active Grant

• Current Assignee: Advanced Optoelectronic Technology, Inc., InnoLux Corporation
• Original Assignee: Advanced Optoelectronic Technology, Inc., Innolux Display Corporation (InnoLux Corporation)
• Inventors: TU, PO-MIN, HUANG, CHIEN-SHIANG, PENG, CHIEN-CHUNG, HUNG, TZU-CHIEN, HUANG, SHIH-CHENG, CHEN, CHANG-HO, HSIEH, TSAU-HUA, LEE, JONG-JAN, SCHUELE, PAUL-JOHN
• Granted Patent: US 10,164,142 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 2933/0025 relating to coatings
• CPC Class Codes: H01L 33/00 Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof H10K50/00 takes precedence; devices consisting of a plurality of semiconductor components formed in or on a common substrate and including semiconductor components having potential barriers, specially adapted for light emission H01L27/15; semiconductor lasers H01S5/00
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

A flip chip light emitting diode includes a semiconductor layer comprising an epitaxial layer an N-semiconductor layer, a light active layer and a P-semiconductor layer arranged from top to bottom in series. A first electrode mounted on the semiconductor layer. A second electrode mounted on the semiconductor layer. A insulating layer mounted on the semiconductor layer. The N-semiconductor layer protrudes away from the epitaxial layer to form a protruding portion. The light active layer and the P-semiconductor layer mounts on the protruding portion in series. The insulating layer mounts between the first electrode and the protruding portion, the light active layer, the P-semiconductor layer and the second electrode. The flip chip light emitting diode also comprises a supporting portion, the supporting portion is mounted on a top surface of the epitaxial layer by a connecting portion. The connecting portion has same or different materials with the supporting portion.

Claims

1. A flip chip light emitting diode, comprising:

a semiconductor layer comprising an epitaxial layer an N-semiconductor layer, a light active layer and a P-semiconductor layer arranged from top to bottom in series;

a first electrode formed on the semiconductor layer;

a second electrode formed on the semiconductor layer;

a insulating layer formed on the semiconductor layer;

wherein, the N-semiconductor layer protrudes away from the epitaxial layer to form a protruding portion, the light active layer and the P-semiconductor layer configured for serial mounts on the protruding portion in series, the insulating layer mounts between the first electrode and the protruding portion, the light active layer, the P-semiconductor layer and the second electrode;

wherein the flip chip light emitting diode comprises a supporting portion, the supporting portion is mounted on a top surface of the epitaxial layer by a connecting portion.

2. The flip chip light emitting diode of claim 1, wherein a width of the flip chip light emitting diode 100 is defined as wd, wherein wd is 5-200 μ

m, a height of the flip chip light emitting diode 100 is defined as Hd, wherein Hd is 0.1-40 μ

m, and a radio, wd/Hd is between 5 and 50.

3. The flip chip light emitting diode of claim 2, wherein a height of the supporting portion 50 is defined as Hp, wherein Hp is between 0.2 μ

m and 40 μ

m, a width of the supporting portion 50 is defined as wp, wherein wp is 0.5-40 μ

m, further, a radio, Hp/wp is between 0.3 and 1.

4. The flip chip light emitting diode of claim 3, wherein wp/wd is between 0.1 and 0.2.

5. The flip chip light emitting diode of claim 1, the protruding portion protrudes from a center portion of the bottom surface of the N-semiconductor layer away from the epitaxial layer, the first electrode mounts on a peripheral portion of a bottom surface of the N-semiconductor away from the epitaxial layer, the first electrode is spaced from the protruding portion.

6. The flip chip light emitting diode of claim 1, the protruding portion protrudes from the peripheral portion of the bottom surface of the N-semiconductor away from the epitaxial layer, the first electrode mounts adjacent a central portion of the bottom surface of the N-semiconductor layer away from the epitaxial layer, the first electrode is spaced from the protruding portion.

7. The flip chip light emitting diode of claim 1, wherein the epitaxial layer has a trapezoidal cross-section, the width of the epitaxial layer gradually increasing from an end adjacent to the N-semiconductor layer toward an end away from the N-semiconductor layer.

8. The flip chip light emitting diode of claim 7, wherein the epitaxial layer defines an apex angle A, A is between 30°

and 80°

.

9. The flip chip light emitting diode of claim 1, wherein a width of the epitaxial layer gradually decreases with an increase in distance away from the N-semiconductor layer.

10. The flip chip light emitting diode of claim 8, wherein the epitaxial layer defines an apex angle B, B is between 100°

and 150°

.

11. The flip chip light emitting diode of claim 1, wherein the supporting portion is made of rubber materials, polymer materials, silicon, or SiNx, the supporting portion 50 is black, white or transparent.

12. The flip chip light emitting diode of claim 1, wherein the first electrode 20 is an N electrode, and the second electrode 30 is a P electrode.

13. A method of manufacturing a flip chip light emitting diode, comprising the steps of:

providing an original semiconductor layer, the original semiconductor layer includes a substrate, the epitaxial layer, the N-semiconductor layer, the light active layer and the P-semiconductor layer arranged from top to bottom in series;

forming a conductive layer 60 on the P-semiconductor layer;

etching a peripheral portion of the conductive layer, a peripheral portion of the P-semiconductor layer, a peripheral portion of the light active layer, a peripheral portion of the N-semiconductor layer from top to bottom, the N-semiconductor layer is etched to form a protruding portion;

forming a first electrode on peripheral portions of the N-semiconductor layer, and forming a second electrode on the conductive layer;

filling a colloid between the, the protruding portion, the light active layer, the P-semiconductor layer, the conductive layer and the first electrode, and curing the colloid to form an insulating layer;

forming a buffering layer on the first electrode and the second electrode to get a original flip chip light emitting diode;

providing a glass substrate with an adhesive layer on one surface of the glass substrate, then reversing the original flip chip light emitting diode onto the adhesive layer of the glass substrate;

separating the substrate from the epitaxial layer by laser;

removing thoroughly the substrate from the epitaxial layer;

forming a connecting portion on the top surface of the epitaxial layer, and forming a supporting portion on the connecting portion;

removing the glass substrate and the adhesive layer to get the flip chip light emitting diode.

14. The method of claim 13, wherein the peripheral portion of the protruding portion, the peripheral portion of the light active layer, the peripheral portion of the P-semiconductor layer and the peripheral portion of the conductive layer are coplanar respect to an axis.

15. The method of claim 13, wherein the first electrode surrounds the protruding portion, the light active layer, the P-semiconductor layer and the conductive layer and is spaced from the, the protruding portion, the light active layer, the P-semiconductor layer and the conductive layer, a height of the first electrode is a sum of a height of the protruding portion, a height of the light active layer, a height of the P-semiconductor layer and a height of the conductive layer and a height of the second electrode, a bottom surface of the first electrode and a bottom surface of the second electrode are coplanar.

16. The method of claim 13, wherein a height of the supporting portion is defined as Hp. Hp is 0.2-40 μ

m, a width of the supporting portion is defined as wp, wp is 0.5-40 μ

m.