LOW NOISE TRANS-IMPEDANCE AMPLIFIERS BASED ON COMPLEMENTARY CURRENT FIELD-EFFECT TRANSISTOR DEVICES

• US 20180219519A1
• Filed: 07/29/2016
• Published: 08/02/2018
• Est. Priority Date: 07/30/2015
• Status: Active Grant

• Current Assignee: Circuit Seed, LLC
• Original Assignee: Circuit Seed, LLC
• Inventors: Schober, Susan Marya, Schober, Robert C.
• Granted Patent: US 10,476,457 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H03F 1/083 in transistor amplifiers H03F1/10 - H03F1/22 take precedence
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/45246 the dif amp being biased in the subthreshold region
• CPC Class Codes: H03F 2203/45692 the LC comprising one or more resistors in series with a capacitor coupled to the LC by feedback
• CPC Class Codes: H03F 3/082 with FET's H03F3/085 takes precedence
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/3022 CMOS common source output SEPP amplifiers H03F3/3008 takes precedence
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03K 19/018557 Coupling arrangements; Impedance matching circuits

Abstract

The present invention relates to a novel and inventive compound device structure for a low noise current amplifier or trans-impedance amplifier. The trans-impedance amplifier includes an amplifier portion, which converts current input into voltage using a complimentary pair of novel n-type and p-type current field-effect transistors (NiFET and PiFET) and a bias generation portion using another complimentary pair of NiFET and PiFET. Trans-impedance of NiFET and PiFET and its gain may be configured and programmed by a ratio of width (W) over length (L) of source channel over the width (W) over length (L) of drain channel (W/L of source channel/W/L of drain channel).

Claims

1. A trans-impedance amplifier, comprising:

a. a first complementary pair of a first n-type current field-effect transistor (NiFET) and a first p-type current field-effect transistor (PiFET);

b. a second complementary pair of a second NiFET and a second PiFET;

wherein each of said NiFETs and PiFETs comprises;

a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of a corresponding conductivity type of said each of said PiFET and NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and said gate terminal is capacitively coupled to said source channel and said drain channel;

wherein said gate terminal of said PiFET and said gate terminal of said NiFET are connected together to form a common gate terminal for said each complimentary pair, said source terminal of said NiFET of said each pair is connected to negative power supply and said source terminal of said PiFET of said each pair is connected to positive power supply, and drain terminals of said NiFET and said PiFET are connected together to form an output; and

wherein said common gate of said first complimentary pair and said common gate of said second complementary pair are connected with said output of said second complementary pair to for generating a bias voltage output;

at least one or both of said diffusion terminal of said first NiFET and said diffusion terminal of said first PiFET receives input current; and

said output of said first complementary pair forms a voltage output of said trans-impedance amplifier.

2. The trans-impedance amplifier as recited in claim 1, wherein ratio between width over length of said source channel and width over length of said drain channel of said first and second NiFETs and said first and second PiFETs is adjusted to obtain a suitable input resistance.

3. The trans-impedance amplifier as recited in claim 1, wherein ratio between width over length of said source channel and width over length of said drain channel of said first and second NiFETs and said first and second PiFETs is adjusted to obtain a suitable trans-resistance.

4. The trans-impedance amplifier as recited in claim 1, wherein ratio between width over length of said source channel and width over length of said drain channel of said first and second NiFETs and said first and second PiFETs is adjusted to obtain a suitable gain.

5. The trans-impedance amplifier as recited in claim 1 further comprises an output amplifier for amplifying said voltage output of said trans-impedance amplifier.

6. The trans-impedance amplifier as recited in claim 5, wherein said output amplifier comprises a third complementary pair of a third NiFET and a third PiFET, wherein each of said third NiFET and said third PiFET comprises:

a diffusion terminal of a corresponding conductivity type of said each of said third PiFET and said third NiFET, defining a source channel between a source terminal and said diffusion terminal, and a drain channel between a drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and a gate terminal capacitively coupled to said source channel and said drain channel;

wherein said gate terminal of said third PiFET and said gate terminal of said third NiFET are connected together to form a common gate terminal, said source terminal of said third NiFET is connected to negative power supply and said source terminal of said third PiFET is connected to positive power supply, and drain terminals of said third NiFET and said third PiFET are connected together to form an output; and

wherein said common gate of said third complimentary pair receives said output of said first complimentary pair.

7. The trans-impedance amplifier as recited in claim 5, wherein said output amplifier comprises a plurality of complementary pairs of a third NiFET and a third PiFET, wherein

each of said third NiFET and said third PiFET comprises:

a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of a corresponding conductivity type of said each of said third PiFET and said third NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and said gate terminal is capacitively coupled to said source channel and said drain channel;

wherein said gate terminal of said third PiFET and said gate terminal of said third NiFET are connected together to form a common gate terminal, said source terminal of said third NiFET is connected to negative power supply and said source terminal of said third PiFET is connected to positive power supply, and drain terminals of said third NiFET and said third PiFET are connected together to form an output of each of said plurality of complementary pairs;

wherein said common gate of a subsequent one of said plurality of complementary pairs receives said output of a prior one of said plurality of complementary pairs; and

wherein said common gate of said first one of said plurality of complementary pairs receives said output of said first complimentary pair.

8. The trans-impedance amplifier as recited in claim 7, wherein said output of said second one of said plurality of complementary pairs is further capacitively coupled to said diffusion terminal of said third NiFET of said first one of said plurality of complementary pairs and to said diffusion terminal of said third PiFET of said first one of said plurality of complementary pairs.

9. The trans-impedance amplifier as recited in claim 8, wherein said output amplifier further comprises a feedforward amplifier receiving said output of said first complementary pair and coupling an output of said feedforward amplifier with said output of said last one of said plurality of complementary pairs.

10. The trans-impedance amplifier as recited in claim 9, wherein said feedforward amplifier is a fourth complementary pair of a fourth NiFET and a fourth PiFET, each of said fourth NiFET and said fourth PiFET comprises:

a diffusion terminal of a corresponding conductivity type of said each of said fourth PiFET and said fourth NiFET, defining a source channel between a source terminal and said diffusion terminal, and a drain channel between a drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and a gate terminal capacitively coupled to said source channel and said drain channel;

wherein said gate terminal of said fourth PiFET and said gate terminal of said fourth NiFET are connected together to form a common gate terminal, said source terminal of said fourth NiFET is connected to negative power supply and said source terminal of said fourth PiFET is connected to positive power supply, and drain terminals of said fourth NiFET and fourth third PiFET are connected together to form said output of said feedforward amplifier;

wherein said common gate of said fourth complementary pair receives said output of said last one of said plurality of complimentary pairs.

11. A differential amplifier for amplifying difference between a first input and a second input, each of said first and second inputs having negative and positive polarity inputs, comprising:

a. a first complementary pair of a first n-type current field-effect transistor (NiFET) and a first p-type current field-effect transistor (PiFET);

b. a second complementary pair of a second NiFET and a second PiFET; and

c. a third complementary pair of a third NiFET and a third PiFET;

wherein each of said NiFETs and PiFETs comprises;

a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of said corresponding conductivity type of said each of PiFET and NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and said gate terminal is capacitively coupled to said source channel and said drain channel;

wherein said gate terminal of said PiFET and said gate terminal of said NiFET are connected together to form a common gate terminal for said each complimentary pair, said source terminal of said NiFET of said each complimentary pair is connected to negative power supply and said source terminal of said PiFET of said each pair is connected to positive power supply, and drain terminals of said NiFET and said PiFET of said each complimentary pair are connected together to form an output; and

wherein said common gate of said first complimentary pair, said common gate of said second complementary pair and said common gate of said third complementary pair are connected with said output of said second complementary pair for generating a bias voltage output;

said diffusion terminal of said third PiFET receives said negative polarity input of said first input;

said diffusion terminal of said first PiFET receives said positive polarity input of said first input;

said diffusion terminal of said third NiFET receives said negative polarity input of said second input;

said diffusion terminal of said first NiFET receives said positive polarity input of said second input; and

said output of said first complementary pair forms output of said differential amplifier.

12. An optical signal receiver, comprising:

a. a photodiode comprising a cathode and anode;

b. a reference for said photodiode, comprising cathode and anode;

c. a differential current amplifier, comprising a first, second and third complementary pairs of a n-type current field-effect transistor (NiFET) and a p-type current field-effect transistor (PiFET);

wherein each of said NiFETs and PiFETs comprises;

a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of a corresponding conductivity type of said each of said PiFET and NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and said gate terminal is capacitively coupled to said source channel and said drain channel;

said gate terminal of said PiFET and said gate terminal of said NiFET are connected together to form a common gate terminal, said source terminal of said NiFET is connected to negative power supply and said source terminal of said PiFET is connected to positive power supply, and drain terminals of said NiFET and said PiFET are connected together to form an output;

said common gate of said first complimentary pair and said common gate of said second complementary pair are connected with said output of said second complementary pair, and received by said common gate terminal of said third complementary pair;

said diffusion terminal of said PiFET of said first complementary pair receives said cathode of said photodiode;

said diffusion terminal of said PiFET of said third complementary pair receives said cathode of said reference;

said diffusion terminal of said NiFET of said first complementary pair receives said anode of said reference;

said diffusion terminal of said NiFET of said third complementary pair receives said anode of said photodiode; and

said output of said first complementary pair forms a voltage output, and said output of said third complementary pair provides an bias voltage for said voltage output.

13. An wireless signal transceiver, comprising:

a. a wireless antenna;

b. a differential current amplifier, comprising a first, second and third complementary pairs of a n-type current field-effect transistor (NiFET) and a p-type current field-effect transistor (PiFET);

wherein each of said NiFETs and PiFETs comprises;

a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of a corresponding conductivity type of said each of said PiFET and NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and said gate terminal is capacitively coupled to said source channel and said drain channel;

said gate terminal of said PiFET and said gate terminal of said NiFET are connected together to form a common gate terminal, said source terminal of said NiFET is connected to negative power supply and said source terminal of said PiFET is connected to positive power supply, and drain terminals of said NiFET and said PiFET are connected together to form an output;

said common gate of said first complimentary pair and said common gate of said second complementary pair are connected with said output of said second complementary pair, and received by said common gate terminal of said third complementary pair;

said diffusion terminal of said PiFET of said first complementary pair receives said antenna;

said diffusion terminal of said PiFET of said third complementary pair is resistively coupled with said antenna;

said diffusion terminals of said NiFET of said first, second and third complementary pairs are connected together to receive current for gain control;

said output of said first complementary pair forms a voltage output, said output of said second complementary pair provides an analog ground for said voltage output, and said output of said third complementary pair provides an bias voltage for said voltage output.

14. A gain controllable trans-impedance amplifier, comprising:

a. a positive current input terminal, and a negative current input terminal,

b. a positive voltage output terminal, and a negative voltage output terminal;

c. a bias output terminal;

d. a first complementary pair of a first n-type current field-effect transistor (NiFET) and a first p-type current field-effect transistor (PiFET);

e. a second complementary pair of a second NiFET and a second PiFET; and

f. a third complementary pair of a third NiFET and a third PiFET;

wherein each of said NiFETs and PiFETs comprises;

a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of said corresponding conductivity type of said each of PiFET and NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and said gate terminal is capacitively coupled to said source channel and said drain channel;

wherein said gate terminal of said PiFET and said gate terminal of said NiFET are connected together to form a common gate terminal for said each complimentary pair, said source terminal of said NiFET of said each complimentary pair is connected to negative power supply and said source terminal of said PiFET of said each pair is connected to positive power supply, and drain terminals of said NiFET and said PiFET of said each complimentary pair are connected together to form an output; and

wherein

said diffusion terminal of said third NiFET receives said negative current input terminal;

said diffusion terminal of said first NiFET receives said positive current input terminal;

said common gate of said first complimentary pair, said common gate of said second complementary pair and said common gate of said third complementary pair are connected with said output of said second complementary pair for said bias voltage output terminal;

said output terminal of said first complementary pair is connected to said positive voltage output terminal;

said output terminal of said third complementary pair is connected to said negative voltage output terminal;

wherein said gain controllable trans-impedance amplifier further comprises gain control switch for selectively connecting said negative voltage supply to said diffusion terminals of said first, second and third PiFETs.

15. An isolator circuit, comprising:

a. a differential current amplifier, comprising a first, second and third complementary pairs of a n-type current field-effect transistor (NiFET) and a p-type current field-effect transistor (PiFET);

wherein each of said NiFETs and PiFETs comprises;

a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of a corresponding conductivity type of said each of said PiFET and NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and a gate terminal capacitively coupled to said source channel and said drain channel, and said gate terminal is capacitively coupled to said source channel and drain channel;

said gate terminal of said PiFET and said gate terminal of said NiFET are connected together to form a common gate terminal, said source terminal of said NiFET is connected to negative power supply and said source terminal of said PiFET is connected to positive power supply, and drain terminals of said NiFET and said PiFET are connected together to form an output;

wherein said common gate of said first complimentary pair and said common gate of said second complementary pair are connected with said output of said second complementary pair, and received by said common gate terminal of said third complementary pair;

said diffusion terminal of said PiFET of said first complementary pair is coupled to an input and output terminal;

said diffusion terminal of said PiFET of said third complementary pair is resistively coupled with said input and output terminal;

said diffusion terminals of said NiFET of said first, second and third complementary pairs are connected together to receive current for gain control;

said output of said first complementary pair forms a voltage output, said output of said second complementary pair provides an analog ground for said voltage output, and said output of said third complementary pair provides an bias voltage for said voltage output.

16. A multiple input and output circulator circuit coupled to a plurality of input and output terminals, comprising:

a. a plurality of differential current amplifiers, each differential current amplifier comprising a first, second and third complementary pairs of a n-type current field-effect transistor (NiFET) and a p-type current field-effect transistor (PiFET);

each of said NiFETs and PiFETs comprises;

i. a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of a corresponding conductivity type of said each of said PiFET and NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and a gate terminal capacitively coupled to said source channel and said drain channel, and said gate terminal is capacitively coupled to said source channel and drain channel;

ii. said gate terminal of said PiFET and said gate terminal of said NiFET are connected together to form a common gate terminal, said source terminal of said NiFET is connected to negative power supply and said source terminal of said PiFET is connected to positive power supply, and drain terminals of said NiFET and said PiFET are connected together to form an output;

wherein said common gate of said first complimentary pair and said common gate of said second complementary pair are connected with said output of said second complementary pair, and received by said common gate terminal of said third complementary pair;

said diffusion terminal of said PiFET of said first complementary pair forms a non-inverting positive current input;

said diffusion terminal of said PiFET of said third complementary pair forms an inverting positive current input;

said diffusion terminal of said NiFET of said first complementary pair forms a non-inverting negative current input;

said diffusion terminal of said NiFET of said third complementary pair forms an inverting negative current input;

said output of said first complementary pair forms a non-inverting voltage output, said output of said second complementary pair provides an analog ground for said voltage output, and said output of said third complementary pair provides an bias voltage for said voltage output;

wherein said non-inverting voltage output of a previous one of said plurality of said differential current amplifiers is capacitively and resistively coupled to said non-inverting and said inverting positive current inputs of a subsequent one of plurality of said differential current amplifiers; and

said non-inverting voltage output of a last one of said plurality of said differential current amplifiers is capacitively and resistively coupled to said non-inverting and said inverting positive current inputs of a first one of said plurality of said differential current amplifiers;

a corresponding one of said plurality of said input and output terminals is coupled to said inverting positive current input of a corresponding one of said plurality of said differential current amplifiers.

17. A latch current comparator, comprising:

a. a differential amplifier for amplifying difference between a first input and a second input, each of said first and second inputs having negative and positive polarity inputs, comprising;

i. a first complementary pair of a first n-type current field-effect transistor (NiFET) and a first p-type current field-effect transistor (PiFET);

ii. a second complementary pair of a second NiFET and a second PiFET; and

iii. a third complementary pair of a third NiFET and a third PiFET; and

b. a comparator, comprising;

i. a fourth complementary pair of a fourth NiFET and a fourth PiFET;

ii. a fifth complementary pair of a fifth NiFET and a fifth PiFET;

iii. a plurality of switches operable on a control signal that alternates enable and setup phases;

iv. a first capacitor and a second capacitor, each has a first terminal and a second terminal;

wherein each of said NiFETs and PiFETs comprises;

a source terminal, a drain terminal, a gate terminal, and a diffusion terminal of said corresponding conductivity type of said each of PiFET and NiFET, defining a source channel between said source terminal and said diffusion terminal, and a drain channel between said drain terminal and said diffusion terminal, said diffusion terminal causes changes in said diffused charge density throughout said source and drain channels, and said gate terminal is capacitively coupled to said source channel and said drain channel;

wherein said gate terminal of said PiFET and said gate terminal of said NiFET are connected together to form a common gate terminal for said each complimentary pair, said source terminal of said NiFET of said each complimentary pair is connected to negative power supply and said source terminal of said PiFET of said each pair is connected to positive power supply, and drain terminals of said NiFET and said PiFET of said each complimentary pair are connected together to form an output; and

wherein said common gate of said first complimentary pair, said common gate of said second complementary pair and said common gate of said third complementary pair are connected with said output of said second complementary pair for generating a bias voltage output;

said diffusion terminal of said third PiFET receives said negative polarity input of said first input;

said diffusion terminal of said first PiFET receives said positive polarity input of said first input;

said diffusion terminal of said third NiFET receives said negative polarity input of said second input;

said diffusion terminal of said first NiFET receives said positive polarity input of said second input; and

said output of said first complementary pair forms positive voltage output of said differential amplifier;

said output of said third complementary pair forms negative voltage output of said differential amplifier;

wherein said output of said fourth complementary pair is capacitively coupled to said input of said fifth complementary pair through said second capacitor;

said second terminal of said first capacitor is coupled to said input of said fourth complementary pair;

during said setup phase of said control signal, said plurality of switches cause said positive voltage output of said differential amplifier to be coupled with said first terminal of said first capacitor, said fourth complementary pair to be self-biased by connecting said output of said fourth complementary pair to said input of said fourth complementary pair, and said fifth complementary pair to be self-biased by connecting said output of said fifth complementary pair to said input of said fifth complementary pair;

during said enable phase of said control signal, said plurality of switches cause said negative voltage output of said differential amplifier to be coupled to said first terminal of said first capacitor, and said output of said fifth complementary pair to said input of said fourth complementary pair.