RESPONDING TO SNOOP REQUESTS

• US 20180225210A1
• Filed: 02/08/2017
• Published: 08/09/2018
• Est. Priority Date: 02/08/2017
• Status: Active Grant

• Current Assignee: Arm Limited (SoftBank Group Corp.)
• Original Assignee: Arm Limited (SoftBank Group Corp.)
• Inventors: MANNAVA, Phanindra Kumar, MATHEWSON, Bruce James, JALAL, Jamshed, BRUCE, Klas Magnus
• Granted Patent: US 10,579,526 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0831 using a bus scheme, e.g. with bus monitoring or watching means
• CPC Class Codes: G06F 13/1615 using a concurrent pipeline structrure
• CPC Class Codes: G06F 2212/60 Details of cache memory
• CPC Class Codes: G06F 2212/621 Coherency control relating to peripheral accessing, e.g. from DMA or I/O device

Abstract

A data processing apparatus includes receiving circuitry to receive a snoop request sent by a source node in respect of requested data and transmitting circuitry. Cache circuitry caches at least one data value. The snoop request includes an indication as to whether the requested data is to be returned to the source node and when the at least one data value includes the requested data, the transmitting circuitry transmits a response to the source node including said requested data, in dependence on said indication.

Claims

1. A data processing apparatus comprising:

receiving circuitry to receive a snoop request sent by a source node in respect of requested data;

transmitting circuitry; and

cache circuitry to cache at least one data value, wherein

said snoop request comprises an indication as to whether said requested data is to be returned to said source node; and

when said at least one data value comprises said requested data, said transmitting circuitry transmits a response to said source node comprising said requested data, in dependence on said indication.

2. A data processing apparatus according to claim 1, wherein

said requested data is stored in said cache circuitry with a cache state that indicates the requested data is shared.

3. A data processing apparatus according to claim 1, wherein

when said at least one data value comprises said requested data, said transmitting circuitry transmits a further response comprising said requested data to a requesting node that made a request at said home node for said requested data.

4. A data processing apparatus according to claim 1, wherein

said indication as to whether said requested data is to be returned to said source node is encoded as a type of said snoop request.

5. A data processing apparatus according to claim 1, wherein

said indication as to whether said requested data is to be returned to said source node is encoded as a bit in said snoop request.

6. A data processing apparatus according to claim 1, wherein

said transmitting circuitry transmits said response in dependence on a further condition.

7. A data processing apparatus according to claim 6, comprising:

mode switching circuitry to switch said data processing apparatus from a return permitted mode to a return prohibited mode, wherein

said further condition is that said data processing apparatus is in a return permitted mode.

8. A data processing apparatus according to claim 7, wherein

when said data processing apparatus is in a return prohibited mode and said at least one data value comprises said requested data and said indication indicates that said requested data is to be returned to said source node, said transmitting circuitry transmits an alternative response to said source node absent said requested data.

9. A data processing apparatus according to claim 7, wherein

when said data processing apparatus changes between said return permitted mode and said return prohibited mode, said data processing apparatus is configured to cause said transmitting circuitry to transmit a notification to said source node comprising a current mode of said data processing apparatus.

10. A data processing apparatus according to claim 1, wherein

said snoop request is an invalidating snoop request.

11. A data processing apparatus comprising:

receiving circuitry to receive a data request in respect of requested data; and

transmitting circuitry to transmit at least one snoop request to at least one other node, wherein

each snoop request comprises an indicator to indicate whether said requested data should be forwarded back to said data processing apparatus in response to that other node having said requested data.

12. A data processing apparatus according to claim 11, comprising

participation circuitry to store a list of which of said at least one other node can forward said requested data in response to said snoop request and having said requested data, wherein

when said receiving circuitry receives a notification regarding whether one of said at least one other node can forward said requested data, said list is updated;

and

said transmitting circuitry is configured to inhibit sending said snoop request where said indicator indicates that requested data should be forwarded back to said data processing apparatus based on a result from said participation circuitry.

13. A data processing apparatus according to claim 11, wherein

when said receiving circuitry receives a response to said snoop request without said requested data, said transmitting circuitry transmits a memory access request to a main memory to access said requested data.

14. A data processing apparatus according to claim 11, comprising:

heuristic circuitry to store, for each of said at least one other node, at least one heuristic and to provide a selected node from said at least one other node on the basis of said at least one heuristic, where

said transmitting circuitry is configured to transmit said snoop request to said selected node.

15. A data processing apparatus according to claim 14, wherein

said heuristic is indicative of a latency.

16. A data processing apparatus according to claim 11, further comprising:

cache circuitry to cache at least one data value, wherein

when said receiving circuitry receives a response to said snoop request comprising said requested data, said requested data is stored in said cache.

17. A data processing apparatus according to claim 16, wherein

said cache is a system cache.

18. A data processing method comprising:

caching at least one data value;

receiving a snoop request sent by a source node in respect of requested data from a requesting node; and

transmitting a response to said snoop request, wherein

said snoop request comprises an indication as to whether said requested data is to be returned to said source node; and

when said at least one data value comprises said requested data, said transmitting circuitry transmits said requested data to said source node in dependence on said indication.

19. A data processing method comprising:

receiving a data request in respect of requested data; and

transmitting at least one snoop request to at least one other node, wherein

each snoop request comprises an indicator to indicate whether said requested data should be forwarded back in response to that other node having said requested data.