APPARATUS FOR COMMUNICATION ACROSS A CAPACITIVELY COUPLED CHANNEL

• US 20180226920A1
• Filed: 02/08/2017
• Published: 08/09/2018
• Est. Priority Date: 02/08/2017
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Mukherjee, Subhashish, Shrivastava, Kumar Anurag, Nasum, Sreeram Subramanyam
• Granted Patent: US 10,447,202 B2
• Time in Patent Office: Days
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07771 the record carrier comprising means for minimising adverse effects on the data communication capability of the record carrier, e.g. minimising Eddy currents induced in a proximate metal or otherwise electromagnetically interfering object
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48101 Connecting bonding areas at the same height, e.g. horizontal bond
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/49096 horizontal
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/642 Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1304 Transistor
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/19011 : including integrated passive components
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H02J 50/12 : of the resonant type
• CPC Class Codes: H03B 2202/05 : Reduction of undesired oscillations through filtering or through special resonator characteristics
• CPC Class Codes: H03B 5/1212 : the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
• CPC Class Codes: H03B 5/1228 : the amplifier comprising one or more field effect transistors
• CPC Class Codes: H04L 25/0266 : Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling

Abstract

Apparatus for communication across a capacitively coupled channel are disclosed herein. An example circuit includes a first plate substantially parallel to a substrate, thereby forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, thereby forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.

Claims

1. A circuit comprising:

a substrate;

a first plate substantially parallel to the substrate, thereby forming a first capacitance intermediate the first plate and the substrate;

a second plate substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate;

a third plate substantially parallel to the substrate, thereby forming a second capacitance intermediate the third plate and the substrate;

a fourth plate substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate; and

an inductor connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.

2. The circuit of claim 1, wherein the inductor is a planar inductor.

3. The circuit of claim 2, wherein the planar inductor is substantially parallel to the substrate.

4. The circuit of claim 1, wherein a first surface area of the first plate is smaller than a second surface area of the substrate.

5. The circuit of claim 4, wherein a third surface area of the second plate is smaller than the first surface area of the first plate.

6. The circuit of claim 1, wherein the first plate is separated from the substrate by a first distance and the third plate is separated from the substrate by the first distance.

7. The circuit of claim 6, wherein the second plate is separated from the first plate by a second distance and the fourth plate is separated from the third plate by the second distance.

8. The circuit of claim 1, wherein the first plate, the second plate, the third plate, and the fourth plate are encased in a dielectric.

9. The circuit of claim 1, further including:

a first transistor having a first terminal connected to the first plate and a second terminal connected to the third plate; and

a second transistor having a third terminal connected to the third plate and a fourth terminal connected to the first plate, the first transistor and the second transistor forming an oscillator.

10. The circuit of claim 9, wherein the LC amplifier has a peak amplitude at a first frequency, the oscillator is to oscillate at the first frequency.

11. The circuit of claim 1, further including:

a first bond wire connected to the second plate; and

a second bond wire connected to the fourth plate, the first plate and the third plate to receive a differential voltage signal for transmission via the first bond wire and the second bond wire.

12. A system for communication across a capacitively coupled channel, the system comprising:

a first die including a first substrate, a first plate, a second plate, a third plate, and a fourth plate, wherein the first plate, the second plate, the third plate, and the fourth plate are substantially parallel to the first substrate, the first plate intermediate the second plate and the first substrate, the third plate intermediate the fourth plate and the first substrate;

a first inductor connecting the first plate and the third plate;

a second die including a second substrate, a fifth plate, a sixth plate, a seventh plate, and an eighth plate, wherein the fifth plate, the sixth plate, the seventh plate, and the eighth plate are substantially parallel to the second substrate, the fifth plate intermediate the sixth plate and the second substrate, the seventh plate intermediate the eighth plate and the second substrate;

a second inductor connecting the fifth plate and the seventh plate;

a first bond wire connecting the second plate and the sixth plate; and

a second bond wire connecting the fourth plate and the eighth plate.

13. The system of claim 12, wherein the first inductor is a planar inductor.

14. The system of claim 13, wherein the planar inductor is substantially parallel to the first substrate.

15. The system of claim 12, wherein the first plate is separated from the first substrate by a first distance and the third plate is separated from the first substrate by the first distance.

16. The system of claim 15, wherein the fifth plate is separated from the second substrate by the first distance, and the seventh plate is separated from the second substrate by the first distance.

17. The system of claim 12, wherein the first plate, the second plate, the third plate, and the fourth plate are encased in a first dielectric.

18. The system of claim 12, wherein the first die is operated in a first voltage domain and the second die is operated in a second voltage domain different from the first voltage domain.

19. The system of claim 12, wherein a differential voltage signal is applied across the first plate and the third plate, and is received across the fifth plate and the seventh plate.

20. A circuit comprising:

a substrate;

a first plate substantially parallel to the substrate, thereby forming a first capacitance intermediate the first plate and the substrate;

a second plate substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate;

an inductor connected to the first plate, the inductor to, in combination with the first capacitance, form an LC amplifier; and

a bond wire connected to the second plate.