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MEMORY SYSTEM AND METHOD OF OPERATING THE SAME

  • US 20180232042A1
  • Filed: 12/01/2017
  • Published: 08/16/2018
  • Est. Priority Date: 02/15/2017
  • Status: Active Grant
First Claim
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1. A memory system comprising:

  • a storage device including a first interface circuit configured to be connected to a processor and a second interface circuit distinct from the first interface circuit; and

    a memory device including a third interface circuit configured to be connected to the processor based on a DRAM interface, a fourth interface circuit configured to be distinct from the third interface circuit and configured to be connected to the second interface circuit, and a random access memory divided into a first memory area and a second memory area,wherein the first memory area is accessed by the processor through the third interface circuit, and the second memory area is accessed by the storage device through the second interface circuit and the fourth interface circuit.

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