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Method of Semiconductor Integrated Circuit Fabrication

  • US 20180233406A1
  • Filed: 04/16/2018
  • Published: 08/16/2018
  • Est. Priority Date: 12/21/2012
  • Status: Active Grant
First Claim
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1. A device comprising:

  • a metal layer disposed over a substrate;

    a catalyst layer disposed on the metal layer;

    a plurality of carbon nanotubes (CNTs) disposed on the catalyst layer; and

    a dielectric layer disposed adjacent to the plurality of CNTs.

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