APPARATUS AND CIRCUIT FOR PROCESSING DATA
First Claim
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1. A communication device comprising:
- a communication processor;
an application processor including a direct memory access unit; and
a memory including;
a first memory region accessed by the communication processor and not by the application processor,a second memory region accessed by the communication processor and the application processor, anda third memory region accessed by the application processor and not by the communication processor,wherein the communication processor is configured to write first information in the first memory region and to write second information in the second memory region, andwherein the application processor is configured to read the second information from the second memory region using the direct memory access unit and to write third information in the third memory region.
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Abstract
A circuit for processing data is provided. The circuit includes an Application Processor (AP), a Communication Processor (CP), and a storage unit including at least a first region which the AP and the CP access and from/to which data related to at least one of the AP and the CP is read/written, and a second region which the CP accesses and from/to which data related to the CP is read/written.
9 Citations
20 Claims
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1. A communication device comprising:
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a communication processor; an application processor including a direct memory access unit; and a memory including; a first memory region accessed by the communication processor and not by the application processor, a second memory region accessed by the communication processor and the application processor, and a third memory region accessed by the application processor and not by the communication processor, wherein the communication processor is configured to write first information in the first memory region and to write second information in the second memory region, and wherein the application processor is configured to read the second information from the second memory region using the direct memory access unit and to write third information in the third memory region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An integrated circuit package comprising:
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a communication processor; an application processor including a direct memory access unit; and a memory including; a first memory region accessed by the communication processor and not by the application processor, a second memory region accessed by the communication processor and the application processor, and a third memory region accessed by the application processor and not by the communication processor, wherein the communication processor is configured to write first information in the first memory region and to write second information in the second memory region, and wherein the application processor is configured to read the second information from the second memory region using the direct memory access unit and to write third information in the third memory region. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A communication device comprising:
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an application processor; a communication processor; and a memory including; a first memory region accessed by the communication processor and not by the application processor, a second memory region accessed by the communication processor and the application processor, and a third memory region accessed by the application processor and not by the communication processor, wherein the application processor is configured to write first information in the third memory region and to write second information in the second memory region, and wherein the communication processor is configured to read the second information from the second memory region and to write third information in the first memory region. - View Dependent Claims (18, 19, 20)
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Specification