DATA PROGRAMMING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT

• US 20180260163A1
• Filed: 05/09/2017
• Published: 09/13/2018
• Est. Priority Date: 03/07/2017
• Status: Active Grant

• Current Assignee: Hefei Core Storage Electronic Limited
• Original Assignee: Hefei Core Storage Electronic Limited
• Inventors: Lee, Hao-Zhi, Zhu, Qi-Ao, Xiao, Meng, Xie, Hui
• Granted Patent: US 10,922,028 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/7202 Allocation control and policies
• CPC Class Codes: G06F 2212/7204 Capacity control, e.g. partitioning, end-of-life degradation
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0635 by changing the path, e.g. traffic rerouting, path reconfiguration
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 8/654 using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories

Abstract

A data programming method, a memory storage device and a memory control circuit unit are provided. The method includes presetting a programming mode of a plurality of first type physical erasing units as a first programming mode, and presetting a programming mode of a plurality of second type physical erasing units as a second programming mode. The method also includes obtaining a change parameter according to usage parameters of the first type physical erasing units and the second type physical erasing units. The method further includes determining whether the change parameter matches a first change condition, and if the change parameter matches the first change condition, programming a write-data into the second type physical erasing unit by using the first programming mode.

Claims

1. A data programming method for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical erasing units, and the data programming method comprises:

dividing the physical erasing units into a plurality of first type physical erasing units and a plurality of second type physical erasing units, wherein a programming mode of the first type physical erasing units is preset as a first programming mode, and a programming mode of the second type physical erasing units is preset as a second programming mode;

recording a usage parameter of each physical erasing unit among the physical erasing units;

obtaining a change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units;

receiving a write-data from a host system;

determining whether the change parameter matches a first change condition; and

selecting at least one physical erasing unit from the second type physical erasing units if the change parameter matches the first change condition, and programming the write-data into the at least one physical erasing unit selected from the second type physical erasing units by using the first programming mode.

2. The data programming method according to claim 1, wherein the step of determining whether the change parameter matches the first change condition comprises:

determining whether the change parameter is greater than a first threshold; and

determining that the change parameter matches the first change condition if the change parameter is greater than the first threshold.

3. The data programming method according to claim 1, wherein before the step of determining whether the change parameter matches the first change condition, the method further comprises:

setting the first type physical erasing units as a use area.

4. The data programming method according to claim 3, further comprising:

determining whether the change parameter matches a second change condition if the second type physical erasing units are set as the use area; and

grouping the first type physical erasing units into the use area, selecting at least one physical erasing unit from the first type physical erasing units and programming the write-data into the at least one physical erasing unit selected from the first type physical erasing units by using the first programming mode if the change parameter matches the second change condition.

5. The data programming method according to claim 4, wherein the step of determining whether the change parameter matches the second change condition comprises:

determining whether change parameter is greater than a second threshold; and

determining that the change parameter matches the second change condition if the change parameter is greater than the second threshold.

6. The data programming method according to claim 1, further comprising:

determining whether the write-data matches a data condition; and

performing the step of determining whether the change parameter matches the first change condition if the write-data matches the data condition.

7. The data programming method according to claim 6, wherein the step of determining whether the write-data matches the data condition comprises:

determining whether a data volume of the write-data is greater than a data volume threshold; and

determining that the write-data matches the data condition if the data volume of the write-data is not greater than the data volume threshold.

8. The data programming method according to claim 6, wherein the step of determining whether the write-data matches the data condition comprises:

determining whether the write-data is a system data; and

determining that the write-data matches the data condition if the write-data is the system data.

9. The data programming method according to claim 1, wherein the step of obtaining the change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units comprises:

obtaining a first average erase count according to erase counts of the first type physical erasing units, and obtaining a second average erase count according to erase counts of the second type physical erasing units; and

obtaining the change parameter according to an erase count ratio between the first average erase count and the second average erase count.

10. The data programming method according to claim 1, wherein the step of obtaining the change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units comprises:

obtaining a first average program count according to program counts of the first type physical erasing units, and obtaining a second average program count according to program counts of the second type physical erasing units; and

obtaining the change parameter according to a program count ratio between the first average program count and the second average program count.

11. The data programming method according to claim 1, wherein the physical erasing units are constituted by a plurality of memory cells, and a number of data bits stored by each memory cell among the memory cells constituting the first type physical erasing units after being programmed by using the first programming mode is less than a number of data bits stored by each memory cell among the memory cells constituting the second type physical erasing units after being programmed by using the second programming mode.

12. A memory storage device, comprising:

a connection interface unit, configured to couple to a host system;

a rewritable non-volatile memory module comprising a plurality of physical erasing units; and

a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module,

wherein the memory control circuit unit is configured to divide the physical erasing units into a plurality of first type physical erasing units and a plurality of second type physical erasing units, wherein a programming mode of the first type physical erasing units is preset as a first programming mode, and a programming mode of the second type physical erasing units is preset as a second programming mode,

wherein the memory control circuit unit is further configured to record a usage parameter of each physical erasing unit among the physical erasing units,

wherein the memory control circuit unit is further configured to obtain a change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units,

wherein the memory control circuit unit is further configured to receive a write-data from the host system,

wherein the memory control circuit unit is further configured to determine whether the change parameter matches a first change condition,

wherein if determining that the change parameter matches the first change condition, the memory control circuit unit is further configured to select at least one physical erasing unit from the second type physical erasing units and program the write-data into the at least one physical erasing unit selected from the second type physical erasing units by using the first programming mode.

13. The memory storage device of claim 12, wherein the operation of determining whether the change parameter matches the first change condition by the memory control circuit unit comprises:

determining whether the change parameter is greater than a first threshold; and

determining that the change parameter matches the first change condition if the change parameter is greater than the first threshold.

14. The memory storage device of claim 12, wherein before the operation of determining whether the change parameter matches the first change condition, the memory control circuit unit is further configured to set the first type physical erasing units as a use area.

15. The memory storage device of claim 14, wherein the memory control circuit unit is further configured to determine whether the change parameter matches a second change condition if the second type physical erasing units are set as the use area,

wherein if the change parameter matches the second change condition, the memory control circuit unit is further configured to group the first type physical erasing units into the use area, select at least one physical erasing unit from the first type physical erasing units and program the write-data into the at least one physical erasing unit selected from the first type physical erasing units by using the first programming mode.

16. The memory storage device of claim 15, wherein the operation of determining whether the change parameter matches the second change condition by the memory control circuit unit comprises:

determining whether change parameter is greater than a second threshold; and

determining that the change parameter matches the second change condition if the change parameter is greater than the second threshold.

17. The memory storage device of claim 12, wherein the memory control circuit unit is further configured to determine whether the write-data matches a data condition, and perform the operation of determining whether the change parameter matches the first change condition if the write-data matches the data condition.

18. The memory storage device of claim 17, wherein the operation of determining whether the write-data matches the data condition by the memory control circuit unit comprises:

determining whether a data volume of the write-data is greater than a data volume threshold; and

determining that the write-data matches the data condition if the data volume of the write-data is not greater than the data volume threshold.

19. The memory storage device of claim 17, wherein the operation of determining whether the write-data matches the data condition by the memory control circuit unit comprises:

determining whether the write-data is a system data; and

determining that the write-data matches the data condition if the write-data is the system data.

20. The memory storage device of claim 12, wherein the operation of obtaining the change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units by the memory control circuit unit comprises:

obtaining a first average erase count according to erase counts of the first type physical erasing units, and obtaining a second average erase count according to erase counts of the second type physical erasing units; and

obtaining the change parameter according to an erase count ratio between the first average erase count and the second average erase count.

21. The memory storage device of claim 12, wherein the operation of obtaining the change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units by the memory control circuit unit comprises:

obtaining a first average program count according to program counts of the first type physical erasing units, and obtaining a second average program count according to program counts of the second type physical erasing units; and

obtaining the change parameter according to a program count ratio between the first average program count and the second average program count.

22. The memory storage device of claim 12, wherein the physical erasing units are constituted by a plurality of memory cells, and a number of data bits stored by each memory cell among the memory cells constituting the first type physical erasing units after being programmed by using the first programming mode is less than a number of data bits stored by each memory cell among the memory cells constituting the second type physical erasing units after being programmed by using the second programming mode.

23. A memory control circuit unit for controlling a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical erasing units, wherein the memory control circuit unit comprises:

a host interface configured to couple to a host system;

a memory interface, configured to couple to the rewritable non-volatile memory module; and

a memory management circuit, coupled to the host interface and the memory interface,

wherein the memory management circuit is configured to divide the physical erasing units into a plurality of first type physical erasing units and a plurality of second type physical erasing units, wherein a programming mode of the first type physical erasing units is preset as a first programming mode, and a programming mode of the second type physical erasing units is preset as a second programming mode,

wherein the memory management circuit is further configured to record a usage parameter of each physical erasing unit among the physical erasing units,

wherein the memory management circuit is further configured to obtain a change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units,

wherein the memory management circuit is further configured to receive a write-data from the host system,

wherein the memory management circuit is configured to determine whether the change parameter matches a first change condition,

wherein if determining that the change parameter matches the first change condition, the memory management circuit is further configured to select at least one physical erasing unit from the second type physical erasing units and program the write-data into the at least one physical erasing unit selected from the second type physical erasing units by using the first programming mode.

24. The memory control circuit unit of claim 23, wherein the operation of determining whether the change parameter matches the first change condition by the memory management circuit comprises:

determining whether the change parameter is greater than a first threshold; and

determining that the change parameter matches the first change condition if the change parameter is greater than the first threshold.

25. The memory control circuit unit of claim 23, wherein before the operation of determining whether the change parameter matches the first change condition, the memory management circuit is further configured to set the first type physical erasing units as a use area.

26. The memory control circuit unit of claim 25, wherein the memory management circuit is further configured to determine whether the change parameter matches a second change condition if the second type physical erasing units are set as the use area,

wherein if the change parameter matches the second change condition, the memory management circuit is further configured to group the first type physical erasing units into the use area, select at least one physical erasing unit from the first type physical erasing units and program the write-data into the at least one physical erasing unit selected from the first type physical erasing units by using the first programming mode.

27. The memory control circuit unit of claim 26, wherein the operation of determining whether the change parameter matches the second change condition by the memory management circuit comprises:

determining whether change parameter is greater than a second threshold; and

determining that the change parameter matches the second change condition if the change parameter is greater than the second threshold.

28. The memory control circuit unit of claim 23, wherein the memory management circuit is further configured to determine whether the write-data matches a data condition, and perform the operation of determining whether the change parameter matches the first change condition if the write-data matches the data condition.

29. The memory control circuit unit of claim 28, wherein the operation of determining whether the write-data matches the data condition by the memory management circuit comprises:

determining whether a data volume of the write-data is greater than a data volume threshold; and

determining that the write-data matches the data condition if the data volume of the write-data is not greater than the data volume threshold.

30. The memory control circuit unit of claim 28, wherein the operation of determining whether the write-data matches the data condition by the memory management circuit comprises:

determining whether the write-data is a system data; and

determining that the write-data matches the data condition if the write-data is the system data.

31. The memory control circuit unit of claim 23, wherein the operation of obtaining the change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units by the memory management circuit comprises:

obtaining a first average erase count according to erase counts of the first type physical erasing units, and obtaining a second average erase count according to erase counts of the second type physical erasing units; and

obtaining the change parameter according to an erase count ratio between the first average erase count and the second average erase count.

32. The memory control circuit unit of claim 23, wherein the operation of obtaining the change parameter according to the usage parameters of the first type physical erasing units and the usage parameters of the second type physical erasing units by the memory management circuit comprises:

obtaining a first average program count according to program counts of the first type physical erasing units, and obtaining a second average program count according to program counts of the second type physical erasing units; and

obtaining the change parameter according to a program count ratio between the first average program count and the second average program count.

33. The memory control circuit unit of claim 23, wherein the physical erasing units are constituted by a plurality of memory cells, and a number of data bits stored by each memory cell among the memory cells constituting the first type physical erasing units after being programmed by using the first programming mode is less than a number of data bits stored by each memory cell among the memory cells constituting the second type physical erasing units after being programmed by using the second programming mode.