WRITING SSD SYSTEM DATA

• US 20180260319A1
• Filed: 03/10/2017
• Published: 09/13/2018
• Est. Priority Date: 03/10/2017
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Inventors: Thompson, Leland, Delaney, Chris, Waidhofer, Gordon
• Application Number:
  US15/455,570
• Publication Number:
  US 20180260319A1
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7207 management of metadata or control data

Abstract

A solid state drive (SSD) and a method for writing user data and system data is disclosed. In one embodiment, the SSD includes a memory controller, a host interface communicatively coupled to the memory controller, and one or more NAND flash memory devices communicatively coupled to the memory controller. The memory controller is configured to write both a user data received via the host interface and a system data generated by the memory controller to one or more blocks of the NAND flash memory devices such that the one or more blocks contain both user data and system data. In one embodiment, the memory controller is figured to divide the system data into one or more segments having a uniform size, and append a header to each segment of system data before writing the system data to the one or more blocks of the NAND flash memory devices.

Claims

1. A solid state drive (SSD) comprising:

a memory controller;

one or more NAND flash memory devices communicatively coupled to the memory controller; and

a host interface communicatively coupled to the memory controller,

wherein the memory controller is configured to write both a user data received via the host interface and a system data generated by the memory controller to one or more blocks of the NAND flash memory devices such that the one or more blocks contain both user data and system data.

2. The SSD of claim 1, wherein the system data includes at least one of a bad sector list, a debug log, and firmware.

3. The SSD of claim 1, wherein the memory controller is further configured to divide the system data into one or more segments having a uniform size, and append a header to each segment of system data before writing the system data to the one or more blocks of the NAND flash memory devices.

4. The SSD of claim 3, wherein the header includes at least one of a logical address associated with a segment of user or system data, a timestamp, and a valid bitmap status.

5. The SSD of claim 1, wherein the NAND flash memory devices are configured to store user data and system data in one or more segments, each segment of user data and each segment of system data having a physical address location on the NAND flash memory device and a logical address comprising a namespace identifier indicating a namespace and a logical block within the namespace.

6. The SSD of claim 5, wherein the memory controller is further configured to assign a namespace identifier to each segment of system data.

7. The SSD of claim 5, wherein the system data comprises a user logical-to-physical (User L2P) table translating logical addresses of one or more segments of user data physical address locations.

8. The SSD of claim 7, wherein the User L2P table comprises a first map translating the namespace identifier of each of the one or more logical address to a starting segment of user data on the one or more NAND flash memory devices, and a second map translating the logical block of each of the one or more logical address to a segment of user data on the one or more NAND flash memory devices.

9. The SSD of claim 5, wherein the memory controller is further configured to write a system logical-to-physical (System L2P) table translating logical addresses of one or more segments of system data to one or more physical address locations of the segments of system data on the NAND flash memory devices.

10. The SSD of claim 9, wherein the System L2P table comprises a first map translating the namespace identifier of each of the one or more logical addresses to a starting segment of system data on the one or more NAND flash memory devices, and a second map translating the logical block of each of the one or more logical addresses to a segment of system data on the one or more NAND flash memory devices.

11. A method of writing user data and system data to one or more NAND flash memory devices communicatively coupled to a memory controller within a solid state drive (SSD), the method comprising:

receiving the user data via a host interface communicatively coupled to the memory controller;

generating the system data with the memory controller; and

writing both the user data and the system data to one or more blocks of the NAND flash memory devices such that the one or more blocks contain both user data and system data.

12. The method of claim 11, wherein the system data includes at least one of a bad sector list, a debug log, and firmware.

13. The method of claim 11, further comprising:

dividing the system data into one or more segments having a uniform size; and

appending a header to each segment of system data before writing the system data to the one or more blocks of the NAND flash memory devices.

14. The method of claim 13, wherein the header includes at least one of a logical address associated with a segment of user or system data, a timestamp, and a valid bitmap status.

15. The method of claim 11, further comprising:

writing the user data and system data in one or more segments, each segment of user data and each segment of system data having a physical address location on the NAND flash memory devices and a logical address comprising a namespace identifier indicating a namespace and a logical block within the namespace.

16. The method of claim 15, further comprising:

assigning a namespace identifier to each segment of system data before writing both the user data and the system data to one or more blocks of the NAND flash memory devices such that the one or more blocks contain both user data and system data.

17. The method of claim 15, wherein the system data comprises a user logical-to-physical (User L2P) table translating logical addresses of one or more segments of user data to physical address locations.

18. The method of claim 11, wherein the User L2P table comprises a first map translating the namespace identifier of each of the one or more logical addresses to a starting segment of user data on the one or more NAND flash memory devices, and a second map translating the logical block of each of the one or more logical addresses to a segment of user data on the one or more NAND flash memory devices.

19. The method of claim 15, further comprising:

writing to the NAND flash memory devices a system logical-to-physical (System L2P) table translating logical addresses of one or more segments of system data to one or more physical address locations of the segments of system data on the NAND flash memory devices.

20. The method of claim 19, wherein the System L2P table comprises a first map translating the namespace identifier of each of the one or more logical addresses to a starting segment of system data on the one or more NAND flash memory devices, and a second map translating the logical block of each of the one or more logical addresses to a segment of system data on the one or more NAND flash memory devices.