METHODS FOR PERFORMING A MEMORY RESOURCE RETRY
First Claim
1. An apparatus, comprising:
- a plurality of memory resources, each memory resource configured to store one or more types of memory commands to be processed;
a memory including a command tracker table that includes a plurality of entries, each entry corresponding to a respective memory command; and
a control circuit configured to;
receive a particular memory command of a particular type;
store a value identifying the particular memory command in a first entry of the command tracker table;
based on the particular type, set an indication in the first entry identifying each memory resource of the plurality of memory resources to be used by the particular memory command; and
process the particular memory command in response to a determination that all memory resources identified in the first entry are available.
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Accused Products
Abstract
In an embodiment, an apparatus includes multiple memory resources, and a resource table that includes entries that correspond to respective memory resources of the multiple memory resources. The apparatus also includes a circuit configured to receive a first memory command. The first memory command is associated with a subset of the multiple memory resources. For each memory resource of the subset, the circuit is also configured to set a respective indicator associated with the first memory command, and to store a first value in a first entry of the resource table in response to a determination that the respective memory resource is unavailable. The circuit is also configured to store a second value in each entry of the resource table that corresponds to a memory resource of the subset in response to a determination that an entry corresponding to a given memory resource of the subset includes the first value.
1 Citation
20 Claims
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1. An apparatus, comprising:
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a plurality of memory resources, each memory resource configured to store one or more types of memory commands to be processed; a memory including a command tracker table that includes a plurality of entries, each entry corresponding to a respective memory command; and a control circuit configured to; receive a particular memory command of a particular type; store a value identifying the particular memory command in a first entry of the command tracker table; based on the particular type, set an indication in the first entry identifying each memory resource of the plurality of memory resources to be used by the particular memory command; and process the particular memory command in response to a determination that all memory resources identified in the first entry are available. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method, comprising:
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receiving, by a cache controller circuit, a particular memory command of a particular type; storing, by the cache controller circuit, a value identifying the particular memory command in a first entry of a command tracker table; based on the particular type, setting, by the cache controller circuit, an indication in the first entry identifying each memory resource of a plurality of resources to be used by the particular memory command; and processing, by the cache controller circuit, the particular memory command in response to determining that all memory resources identified in the first entry are available. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An apparatus, comprising:
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a plurality of memory resources, each memory resource configured to store one or more types of memory commands to be processed; a memory including a memory command queue that includes a plurality of entries, each entry corresponding to a respective memory command; and a control circuit configured to; retrieve, from a first entry in the memory command queue, a particular memory command of a particular type; based on the particular type, set an indication in the first entry identifying each memory resource of the plurality of memory resources to be used by the particular memory command; and process the particular memory command in response to a determination that all memory resources identified in the first entry are available. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification