NONVOLATILE MEMORY STORAGE SYSTEM

• US 20180286495A1
• Filed: 03/31/2017
• Published: 10/04/2018
• Est. Priority Date: 03/31/2017
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Dongsup Jin, Eun Chu Oh, Hong Rak Son, Jun Jin Kong, Pilsang Yoon
• Inventors: OH, Eun Chu, YOON, Pilsang, KONG, Jun Jin, SON, Hong Rak, JIN, Dongsup
• Granted Patent: US 10,229,749 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/0466 comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] G11C16/0483, G11C16/0491 take precedence
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 2029/5004 Voltage
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/50004 of threshold voltage

Abstract

A nonvolatile memory storage system includes a plurality of memory cells and a memory controller configured to transmit a read command to a nonvolatile memory device based on a plurality of read voltages. The nonvolatile memory device performs a first read operation on a first level among the N levels based on a first read voltage among the plurality of read voltages, counts the number of on-cells that respond to the first read voltage among the plurality of memory cells, and adjusts a level of a second read voltage to be used to perform a second read operation on the first level or a second level among the N levels among the plurality of read voltages according to a comparison result of the counted number of on-cells and the number of reference cells.

Claims

1. A nonvolatile memory storage system comprising:

a nonvolatile memory device including a plurality of memory cells forming a three-dimensional (3D) structure, each memory cell constituted by a cell of N(N is a natural number greater than

     2)-levels and configured to read data stored in the plurality of memory cells based on a plurality of read voltages; and

a memory controller configured to transmit a read command to the nonvolatile memory device so that the data is read from the nonvolatile memory device,

wherein the nonvolatile memory device is further configured to;

perform a first read operation on a first level among the N-levels based on a first read voltage among the plurality of read voltages;

count a number of on-cells that respond to the first read voltage among the plurality of memory cells; and

perform a second read operation by adjusting a level of a second read voltage to be used to perform the second read operation on the first level or a second level among the N-levels among the plurality of read voltages according to a comparison result of the counted number of on-cells and a number of reference cells

wherein the second read voltage is applied after the first read voltage.

2. The nonvolatile memory storage system of claim 1, wherein the number of reference cells is a value to reduce at least one of the number of errors that occur due to a shift of a threshold voltage distribution of the plurality of memory cells and occurrence probability of errors.

3. The nonvolatile memory storage system of claim 1, wherein the memory controller is configured to transmit information of a read voltage level lookup table including a corresponding relation between the plurality of read voltages according to the number of reference cells corresponding to the first read voltage and a plurality of read voltage level changes to the nonvolatile memory device together with the read command.

4. The nonvolatile memory storage system of claim 3, wherein the nonvolatile memory device comprises a control logic and voltage generator configured to generate the plurality of read voltages,

wherein the control logic and voltage generator comprises:

a cell count comparison circuit configured to compare the counted number of on-cells with the number of reference cells; and

a read voltage level selector configured to output a new read voltage obtained by adding a value corresponding the second read voltage among the plurality of read voltage level changes to the second read voltage according to the comparison result.

5. The nonvolatile memory storage system of claim 1, further comprising a cell counter configured to count the number of on-cells that respond to the first read voltage.

6. The nonvolatile memory storage system of claim 1, wherein the nonvolatile memory device is further configured to:

perform the first read operation on the first level among the N levels based on the first read voltage among the plurality of read voltages;

count the number of on-cells that respond to the first read voltage among the plurality of memory cells while performing a third read operation on one of the first level, the second level and a third level among the N-levels based on a third read voltage among the plurality of read voltages; and

adjust a level of the second read voltage according to a comparison result of the counted number of on-cells and the number of reference cells.

7. The nonvolatile memory storage system of claim 1,wherein the memory controller is configured to calculate a plurality of read voltage level changes according to the number of reference cells corresponding to the first read voltage and transmit information of the plurality of calculated read voltage level changes to the nonvolatile memory device together with the read command.

8. The nonvolatile memory storage system of claim 1, wherein the second read voltage is the highest read voltage.

9. The nonvolatile memory storage system of claim 1, wherein when the counted number of on-cells is greater than the number of reference cells, the nonvolatile memory device adjusts a level of the second read voltage.

10. A nonvolatile memory storage system comprising:

a nonvolatile memory device configured to include a plurality of memory cells forming a three-dimensional (3D) structure, and a memory controller configured to control the nonvolatile memory device so that the data is read from the nonvolatile memory device

wherein the nonvolatile memory device include a plurality of memory cells each constituted by a cell of N (N is a natural number greater than

     1)-levels;

wherein the nonvolatile memory device is further configured to;

read data stored in the plurality of memory cells based on a plurality of read voltages,

perform a first read operation on a first level among the N-levels based on a first read voltage among the plurality of read voltages

count a number of on-cells or off-cells that respond to the first read voltage among the plurality of memory cells; and

perform a second read operation by adjusting a level of a second read voltage to be used to perform the second read operation on the first level or a second level among the N-levels among the plurality of read voltages according to a comparison result of the counted number of on-cells or off-cells and the number of reference cells

wherein the second read voltage is applied after the first read voltage.

11. The nonvolatile memory storage system of claim 10, wherein the memory controller is configured to calculate a plurality of read voltage level changes according to the number of reference cells corresponding to the first read voltage and transmit information of the plurality of calculated read voltage level changes to the nonvolatile memory device together with the read command.

12. The nonvolatile memory storage system of claim 11, wherein the memory controller is configured to calculate the plurality of read voltage level changes based on access environment information of when accessing the nonvolatile memory device.

13. The nonvolatile memory storage system of claim 12, wherein the nonvolatile memory device comprises a control logic and voltage generator configured to generate the plurality of read voltages,

wherein the control logic and voltage generator comprises:

a cell count comparison circuit configured to compare the counted number of on cells or off-cells with the number of reference cells; and

a read voltage level selector configured to output a new read voltage obtained by adding a value corresponding the second read voltage among the plurality of read voltage level changes to the second read voltage according to the comparison result.

14. The nonvolatile memory storage system of claim 10, further comprising a cell counter configured to count the number of on cells or off-cells that respond to the first read voltage.

15. The nonvolatile memory storage system of claim 10, wherein when the counted number of off-cells is smaller than the number of reference cells, the nonvolatile memory device is configured to adjust a level of the second read voltage;

and

wherein when the counted number of on-cells is larger than the number of reference cells, the nonvolatile memory device is configured to adjust the level of the second read voltage.