SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20180286986A1
• Filed: 05/31/2018
• Published: 10/04/2018
• Est. Priority Date: 03/06/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: SAKATA, Junichiro, HIROHASHI, Takuya, KISHIDA, Hideyuki
• Granted Patent: US 10,236,391 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/1033 with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with channel and gate aligned in the lengthwise direction H01L29/42376; with buried channel H01L29/7838
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42356 Disposition, e.g. buried gate electrode H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.

Claims

1. (canceled)

2. A semiconductor device comprising:

a gate electrode over a substrate;

a gate insulating layer over the gate electrode;

a first oxide semiconductor layer over the gate insulating layer;

a second oxide semiconductor layer over the first oxide semiconductor layer;

a source electrode electrically connected to the second oxide semiconductor layer;

a drain electrode electrically connected to the second oxide semiconductor layer;

a first region between the second oxide semiconductor layer and the source electrode; and

a second region between the second oxide semiconductor layer and the drain electrode,

wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, gallium and zinc,

wherein a composition ratio of the first region is different from a composition ratio of each of the first oxide semiconductor layer and the second oxide semiconductor layer,

wherein a composition ratio of the second region is different from a composition ratio of each of the first oxide semiconductor layer and the second oxide semiconductor layer,

wherein each of the source electrode and the drain electrode comprises at least one of titanium, aluminum, manganese, magnesium, zirconium, beryllium, thorium, and copper, and

wherein each of the source electrode and the drain electrode is in contact with the gate insulating layer.

3. The semiconductor device according to claim 2,

wherein the first oxide semiconductor layer comprises a channel formation region,

wherein a concentration of oxygen in the first region is lower than a concentration of oxygen in the channel formation region, and

wherein a concentration of oxygen in the second region is lower than the concentration of oxygen in the channel formation region.

4. The semiconductor device according to claim 2, wherein each of the source electrode and the drain electrode overlap with the gate electrode.

5. The semiconductor device according to claim 2, wherein a thickness of the first oxide semiconductor layer is larger than a thickness of the second oxide semiconductor layer.

6. The semiconductor device according to claim 2, further comprising an insulating film over and in contact with the source electrode, the drain electrode, and the second oxide semiconductor layer.

7. The semiconductor device according to claim 2, wherein the second oxide semiconductor layer comprises a depressed portion between the source electrode and the drain electrode.

8. The semiconductor device according to claim 2, wherein each of the first region and the second region comprises a metal oxide.

9. A display module comprising the semiconductor device according to claim 2, wherein the display module comprises an FPC.

10. An electronic apparatus comprising the semiconductor device according to claim 2, wherein the electronic apparatus comprises at least one of a speaker, a battery, and an operation key.

11. A semiconductor device comprising:

a gate electrode over a substrate;

a gate insulating layer over the gate electrode;

a first oxide semiconductor layer over the gate insulating layer;

a second oxide semiconductor layer over the first oxide semiconductor layer;

a source electrode electrically connected to the second oxide semiconductor layer;

a drain electrode electrically connected to the second oxide semiconductor layer;

a first region between the second oxide semiconductor layer and the source electrode; and

a second region between the second oxide semiconductor layer and the drain electrode,

wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, gallium and zinc,

wherein a composition ratio of the first region is different from a composition ratio of each of the first oxide semiconductor layer and the second oxide semiconductor layer,

wherein a composition ratio of the second region is different from the composition ratio of each of the first oxide semiconductor layer and the second oxide semiconductor layer,

wherein each of the source electrode and the drain electrode comprises at least one of titanium, aluminum, manganese, magnesium, zirconium, beryllium, thorium, and copper,

wherein each of the source electrode and the drain electrode is in contact with the gate insulating layer, and

wherein an upper edge of the first oxide semiconductor layer is aligned with a bottom edge of the second oxide semiconductor layer.

12. The semiconductor device according to claim 11,

wherein the first oxide semiconductor layer comprises a channel formation region,

wherein a concentration of oxygen in the first region is lower than a concentration of oxygen in the channel formation region, and

wherein a concentration of oxygen in the second region is lower than the concentration of oxygen in the channel formation region.

13. The semiconductor device according to claim 11, wherein each of the source electrode and the drain electrode overlap with the gate electrode.

14. The semiconductor device according to claim 11, wherein a thickness of the first oxide semiconductor layer is larger than a thickness of the second oxide semiconductor layer.

15. The semiconductor device according to claim 11, further comprising an insulating film over and in contact with the source electrode, the drain electrode, and the second oxide semiconductor layer.

16. The semiconductor device according to claim 11, wherein the second oxide semiconductor layer comprises a depressed portion between the source electrode and the drain electrode.

17. The semiconductor device according to claim 11, wherein each of the first region and the second region comprises a metal oxide.

18. A display module comprising the semiconductor device according to claim 11, wherein the display module comprises an FPC.

19. An electronic apparatus comprising the semiconductor device according to claim 11, wherein the electronic apparatus comprises at least one of a speaker, a battery, and an operation key.