PHASE ADJUSTING CIRCUIT, INVERTER CIRCUIT, AND POWER SUPPLY SYSTEM

• US 20180287619A1
• Filed: 02/06/2018
• Published: 10/04/2018
• Est. Priority Date: 03/31/2017
• Status: Active Grant

• Current Assignee: Sumida Corporation
• Original Assignee: Sumida Corporation
• Inventors: MIYAZAKI, Hiroyuki
• Granted Patent: US 10,447,281 B2
• Time in Patent Office: Days
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 7/4815 Resonant converters H02M7/4811 and H02M7/4826 take precedence
• CPC Class Codes: H02M 7/4818 with means for adaptation of resonance frequency, e.g. by modification of capacitance or inductance of resonance circuits
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: H02M 7/53871 with automatic control of output voltage or current
• CPC Class Codes: H02M 7/5395 by pulse-width modulation
• CPC Class Codes: H03L 7/00 Automatic control of frequency or phase; Synchronisation
• CPC Class Codes: H03L 7/085 concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/1075 by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth H03L7/1072 takes precedence
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A phase adjusting circuit is provided that can highly precisely adjust frequencies throughout the entire frequency range to be dealt with. A PLL circuit includes: a reference-signal input terminal from which a reference signal is input; a feedback-signal input terminal from which a feedback signal is input; and an output terminal from which an output signal based on a phase difference between the reference signal and the feedback signal is output. A filter circuit is connected to the reference-signal input terminal and the output terminal, and causes a phase of the reference signal to be delayed when the oscillation frequency of an inverter circuit including the PLL circuit falls in a high range. A delay circuit is connected to the output terminal, and causes the output signal to be delayed when the oscillation frequency of the inverter circuit falls in a low range lower than the high range.

Claims

1. A phase adjusting circuit, comprising:

a phase synchronizing circuit including;

a reference-signal input terminal from which a reference signal is input;

a feedback-signal input terminal from which a feedback signal is input; and

an output terminal from which an output signal based on a phase difference between the reference signal and the feedback signal is output;

a first circuit that is connected to the reference-signal input terminal and the output terminal, and causes a phase of the reference signal to be delayed in a case where an oscillation frequency of a circuit main body including the phase synchronizing circuit falls in a first level; and

a second circuit that is connected to the output terminal, and causes the output signal to be delayed in a case where the oscillation frequency of the circuit main body falls in a second level that is lower than the first level.

2. The phase adjusting circuit according to claim 1, wherein

the first circuit is a filter circuit including a first capacitive element, a coil element, and a first resistance element having a variable resistance value.

3. The phase adjusting circuit according to claim 1, wherein

the second circuit is a delay circuit including a second capacitive element and a second resistance element having a variable resistance value.

4. An inverter circuit including the phase adjusting circuit according to claim 1.

5. A power supply system including the inverter circuit according to claim 4.