LOW OFFSET CURRENT SENSE AMPLIFIER

• US 20180301174A1
• Filed: 01/30/2018
• Published: 10/18/2018
• Est. Priority Date: 04/14/2017
• Status: Active Grant

• Current Assignee: STMicroelectronics International N.V. (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Alps SAS (STMicroelectronics NV)
• Inventors: Arno, Patrik
• Granted Patent: US 10,803,911 B2
• Time in Patent Office: Days
• CPC Class Codes: G01R 15/14 Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
• CPC Class Codes: G01R 19/0092 measuring current only all subgroups of G01R19/00 take precedence
• CPC Class Codes: G06F 1/189 Power distribution
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G11C 7/062 Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
• CPC Class Codes: G11C 7/08 Control thereof

Abstract

A current sense amplifier includes: first and second intermediate nodes coupled to first and second nodes of a sense resistor by a chopper, and to respective branches of a current mirror; a differential amplifier having inputs coupled to the first and second intermediate nodes and adapted to generate first and second voltage signals; and first and second transistors adapted to be controlled by the first and second voltage signals respectively and each having one of its main current conducting nodes coupled to a respective one of the first and second intermediate nodes.

Claims

1. A current sense amplifier, comprising:

a sense resistor configured to conduct a current to be measured;

first and second intermediate nodes;

a chopper electrically coupling the first and second intermediate nodes to first and second nodes of the sense resistor;

a current mirror having first and second branches electrically coupled to the first and second intermediate nodes;

a differential amplifier having inputs coupled to the first and second intermediate nodes and configured to generate a first voltage signal when the voltage at the first intermediate node is greater than a voltage at the second intermediate node, and to generate a second voltage signal when the voltage at the second intermediate node is greater than the voltage of the first intermediate node;

a first transistor configured to be controlled by the first voltage signal and having a first main current conducting node coupled to a first one of the first intermediate node; and

a second transistor configured to be controlled by the second voltage signal and a first main current conducting node coupled to a second one of the first and second intermediate nodes.

2. The current sense amplifier of claim 1, further comprising an output resistor coupled to second main current conducting nodes of the first and second transistors.

3. The current sense amplifier of claim 1, further comprising:

an output resistor; and

third and fourth transistors having respective main conducting nodes coupled to the output resistor, wherein the third and fourth transistors are configured to be respectively controlled by the first and second voltage signals.

4. The current sense amplifier of claim 1, further comprising a first input resistor coupling the chopper to the first intermediate node and a second input resistor coupling the chopper to the second intermediate node.

5. The current sense amplifier of claim 3, wherein the chopper comprises:

a first switch coupling the first node of the sense resistor to the first input resistor;

a second switch coupling the second node of the sense resistor to the second input resistor;

a third switch coupling the first node of the sense resistor to the second input resistor; and

a fourth switch coupling the second node of the sense resistor to the first input resistor.

6. The current sense amplifier of claim 5, further comprising a control circuit configured to generate, based on a clock signal:

a first phase signal for controlling the first and second switches; and

a second phase signal for controlling the third and fourth switches.

7. The current sense amplifier of claim 6, wherein the control circuit is configured to control the chopper to have a duty cycle of between 49.5 and 50.5 percent.

8. The current sense amplifier of claim 1, wherein the current mirror comprises a third transistor coupling the first intermediate node to a supply voltage rail or ground rail and a fourth transistor coupling the second intermediate node to the supply voltage rail or ground rail, the third and fourth transistors having control nodes coupled together and to the first or second intermediate node.

9. A universal serial bus (USB) port capable of power delivery, comprising:

an interface configured to communicate with a load; and

a current sense amplifier coupled to the interface and including;

a sense resistor configured to conduct a current to be measured;

first and second intermediate nodes;

a chopper electrically coupling the first and second intermediate nodes to first and second nodes of the sense resistor;

a current mirror having first and second branches electrically coupled to the first and second intermediate nodes;

a differential amplifier having inputs coupled to the first and second intermediate nodes and configured to generate a first voltage signal when the voltage at the first intermediate node is greater than a voltage at the second intermediate node, and to generate a second voltage signal when the voltage at the second intermediate node is greater than the voltage of the first intermediate node;

a first transistor configured to be controlled by the first voltage signal and having a first main current conducting node coupled to a first one of the first intermediate node; and

a second transistor configured to be controlled by the second voltage signal and a first main current conducting node coupled to a second one of the first and second intermediate nodes.

10. The USB port of claim 9, wherein the current sense amplifier includes an output resistor coupled to second main current conducting nodes of the first and second transistors.

11. The USB port of claim 9, wherein the current sense amplifier includes:

an output resistor; and

third and fourth transistors having respective main conducting nodes coupled to the output resistor, wherein the third and fourth transistors are configured to be respectively controlled by the first and second voltage signals.

12. The USB port of claim 9, wherein the current sense amplifier includes a first input resistor coupling the chopper to the first intermediate node and a second input resistor coupling the chopper to the second intermediate node.

13. The USB port of claim 12, wherein the chopper comprises:

a first switch coupling the first node of the sense resistor to the first input resistor;

a second switch coupling the second node of the sense resistor to the second input resistor;

a third switch coupling the first node of the sense resistor to the second input resistor; and

a fourth switch coupling the second node of the sense resistor to the first input resistor.

14. The USB port of claim 9, wherein the current sense amplifier includes:

a control circuit configured to generate, based on a clock signal;

a first phase signal for controlling the first and second switches; and

a second phase signal for controlling the third and fourth switches.

15. The USB port of claim 9, wherein the current mirror comprises a third transistor coupling the first intermediate node to a supply voltage rail or ground rail and a fourth transistor coupling the second intermediate node to the supply voltage rail or ground rail, the third and fourth transistors having control nodes coupled together and to the first or second intermediate node.

16. A current sense amplifier, comprising:

a sense resistor configured to conduct a current to be measured;

a differential amplifier having first and second inputs and first and second outputs, the first and second inputs being respectively coupled to first and second nodes of the sense resistor;

a first transistor having a control node and first and second current conduction nodes, the control node being electrically coupled to the first output of the differential amplifier and the first current conduction node being electrically coupled to the second input of the differential amplifier; and

a second transistor having a control node and first and second current conduction nodes, the control node of the second transistor being electrically coupled to the second output of the differential amplifier and the first current conduction node of the second transistor being electrically coupled to the first input of the differential amplifier.

17. The current sense amplifier of claim 16, further comprising:

an output resistor; and

third and fourth transistors having respective first current conduction nodes electrically coupled to the output resistor, respective second current conduction nodes electrically coupled to the second current conduction nodes of the first and second transistors, and respective control terminals electrically coupled to the first and second outputs of the differential amplifier, respectively.

18. The current sense amplifier of claim 16, further comprising:

first and second intermediate nodes respectively electrically coupled to the first and second inputs of the differential amplifier;

a chopper electrically coupling the first and second intermediate nodes to the first and second nodes of the sense resistor, respectively; and

a current mirror having first and second branches electrically coupled to the first and second intermediate nodes, respectively.

19. The current sense amplifier of claim 18, further comprising a first input resistor coupling the chopper to the first intermediate node and a second input resistor coupling the chopper to the second intermediate node.

20. The current sense amplifier of claim 18, wherein the chopper comprises:

a first switch coupling the first node of the sense resistor to the first input resistor;

a second switch coupling the second node of the sense resistor to the second input resistor;

a third switch coupling the first node of the sense resistor to the second input resistor; and

a fourth switch coupling the second node of the sense resistor to the first input resistor.