INSTRUCTIONS FOR DUAL DESTINATION TYPE CONVERSION, MIXED PRECISION ACCUMULATION, AND MIXED PRECISION ATOMIC MEMORY OPERATIONS
First Claim
1. A system used to execute an instruction, the system comprising:
- a memory;
a processor comprising;
a fetch circuit to fetch the instruction from a code storage, the instruction comprising an opcode, a first destination identifier, and a source identifier to specify a source vector register, the source vector register comprising a plurality of single precision floating point data elements;
a decode circuit to decode the fetched instruction; and
an execution circuit to execute the decoded instruction to;
convert the elements of the source vector register into double precision floating point values, store a first half of the double precision floating point values to a first location identified by the first destination identifier, and store a second half of the double precision floating point values to a second location.
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Accused Products
Abstract
Disclosed embodiments relate to instructions for dual-destination type conversion, accumulation, and atomic memory operations. In one example, a system includes a memory, a processor including: a fetch circuit to fetch the instruction from a code storage, the instruction including an opcode, a first destination identifier, and a source identifier to specify a source vector register, the source vector register including a plurality of single precision floating point data elements, a decode circuit to decode the fetched instruction, and an execution circuit to execute the decoded instruction to: convert the elements of the source vector register into double precision floating point values, store a first half of the double precision floating point values to a first location identified by the first destination identifier, and store a second half of the double precision floating point values to a second location.
9 Citations
20 Claims
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1. A system used to execute an instruction, the system comprising:
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a memory; a processor comprising; a fetch circuit to fetch the instruction from a code storage, the instruction comprising an opcode, a first destination identifier, and a source identifier to specify a source vector register, the source vector register comprising a plurality of single precision floating point data elements; a decode circuit to decode the fetched instruction; and an execution circuit to execute the decoded instruction to;
convert the elements of the source vector register into double precision floating point values, store a first half of the double precision floating point values to a first location identified by the first destination identifier, and store a second half of the double precision floating point values to a second location. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of executing an instruction, the method comprising:
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fetching the instruction from a code storage, the instruction comprising an opcode, a first destination identifier, and a source identifier to specify a source vector register comprising a plurality of single precision floating point data elements; decoding the fetched instruction by a decode circuit; and executing, by an execution circuit, the decoded instruction to;
convert the elements of the source vector register into double precision floating point values, store a first half of the double precision floating point values to a first location identified by the first destination identifier, and store a second half of the double precision values to a second location. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. An apparatus for executing an instruction, the apparatus comprising:
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means for fetching an instruction, the means for fetching to fetch the instruction from a code storage, the instruction comprising an opcode, a first destination identifier, and a source identifier to specify a source vector register, the source vector register comprising a plurality of single precision floating point data elements; means for decoding to decode the fetched instruction; and means for executing the decoded instruction to;
convert the elements of the source vector register into double precision floating point values, store a first half of the double precision floating point values to a first location identified by the first destination identifier, and store a second half of the double precision floating point values to a second location. - View Dependent Claims (19, 20)
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Specification