MATRIX-ADDRESSED TILES AND ARRAYS
First Claim
1. A matrix-addressed tile, comprising:
- a tile substrate;
a two-dimensional array of pixels, arranged in rows and columns, disposed on the tile substrate, the array of pixels defining a contiguous pixel area of the tile substrate such that each pixel in the array of pixels is disposed within the contiguous pixel area;
a one-dimensional array of column-data lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of column-data lines is within the contiguous pixel area and each column-data line is electrically connected to each pixel one of the columns;
a one-dimensional array of row-select lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of row-select lines is within the contiguous pixel area and each row-select line is electrically connected to each pixel in one of the rows;
at least one column-data line contact pad electrically connected to each of the column-data lines, each column-data line contact pad disposed at least partially within the pixel area and between at least two pixels; and
at least one row-select line contact pad connected to each of the row-select lines, each row-select line contact pad disposed at least partially within the pixel area and between at least two pixels.
3 Assignments
0 Petitions
Accused Products
Abstract
A matrix-addressed tile comprises a tile substrate having a two-dimensional array of pixels arranged in rows and columns defining a contiguous pixel area that includes all of the pixels. A one-dimensional array of column-data lines electrically connected to columns of pixels and a one-dimensional array of row-select lines connected to rows of pixels are disposed on the tile substrate at least partially in the pixel area. At least one column-data line contact pad electrically connected to each of the column-data lines and at least one row-select contact pad electrically connected to each of the row-select lines are disposed at least partially within the pixel area and between at least two pixels. A matrix-addressed tiled system includes two or more matrix-addressed tiles electrically connected through the column-data line contact pads and row-select line contact pads.
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Citations
38 Claims
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1. A matrix-addressed tile, comprising:
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a tile substrate; a two-dimensional array of pixels, arranged in rows and columns, disposed on the tile substrate, the array of pixels defining a contiguous pixel area of the tile substrate such that each pixel in the array of pixels is disposed within the contiguous pixel area; a one-dimensional array of column-data lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of column-data lines is within the contiguous pixel area and each column-data line is electrically connected to each pixel one of the columns; a one-dimensional array of row-select lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of row-select lines is within the contiguous pixel area and each row-select line is electrically connected to each pixel in one of the rows; at least one column-data line contact pad electrically connected to each of the column-data lines, each column-data line contact pad disposed at least partially within the pixel area and between at least two pixels; and at least one row-select line contact pad connected to each of the row-select lines, each row-select line contact pad disposed at least partially within the pixel area and between at least two pixels. - View Dependent Claims (2, 3, 5, 6, 7, 8, 9, 12, 13, 14, 15, 20, 24, 25)
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4. (canceled)
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10-11. -11. (canceled)
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16-19. -19. (canceled)
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21-23. -23. (canceled)
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26-29. -29. (canceled)
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30. A matrix-addressed tiled system, comprising:
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two or more tiles each comprising; a tile substrate; a two-dimensional array of pixels, arranged in rows and columns, disposed on the tile substrate, the array of pixels defining a contiguous pixel area of the tile substrate such that each pixel in the array of pixels is disposed within the contiguous pixel area; a one-dimensional array of column-data lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of column-data lines is within the contiguous pixel area and each column-data line is electrically connected to each pixel one of the columns; a one-dimensional array of row-select lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of row-select lines is within the contiguous pixel area and each row-select line is electrically connected to each pixel in one of the rows; at least one column-data line contact pad electrically connected to each of the column-data lines, each column-data line contact pad disposed at least partially within the pixel area and between at least two pixels; and at least one row-select line contact pad connected to each of the row-select lines, each row-select line contact pad disposed at least partially within the pixel area and between at least two pixels, wherein, for each of the two or more tiles; a) a column-data line contact pad on one of the two or more tiles is electrically connected to a column-data line contact pad of a different one of the two or more tiles; b) a row-select line contact pad on one of the two or more tiles is electrically connected to a row-select line contact pad of a different one of the two or more tiles;
orc) both a) and b). - View Dependent Claims (31, 32, 33, 34)
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35-37. -37. (canceled)
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38. A matrix-addressed tiled system, comprising:
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a plurality of corner tiles arranged in a one- or two-dimensional array, wherein the plurality of corner tiles are not electrically connected to each other and each of the plurality of corner tiles comprises; a tile substrate; a two-dimensional array of pixels, arranged in rows and columns, disposed on the tile substrate, the array of pixels defining a contiguous pixel area of the tile substrate such that each pixel in the array of pixels is disposed within the contiguous pixel area; a one-dimensional array of column-data lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of column-data lines is within the contiguous pixel area and each column-data line is electrically connected to each pixel one of the columns; a one-dimensional array of row-select lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of row-select lines is within the contiguous pixel area and each row-select line is electrically connected to each pixel in one of the rows; at least one column-data line contact pad electrically connected to each of the column-data lines, each column-data line contact pad disposed at least partially within the pixel area and between at least two pixels; and at least one row-select line contact pad connected to each of the row-select lines, each row-select line contact pad disposed at least partially within the pixel area and between at least two pixels; a plurality of serially connected column-data circuits disposed on the tile substrate at least partially in the pixel area and between at least two pixels, each column-data circuit electrically connected to a column-data line and a column-data line contact pad; and a plurality of serially connected row-select circuits disposed on the tile substrate at least partially in the pixel area and between at least two pixels, each row-select circuit electrically connected to a row-select line and a row-select line contact pad; and a system controller electrically connected to each of the plurality of corner tiles.
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Specification