SLAVE MASTER-WRITE/READ DATAGRAM PAYLOAD EXTENSION

• US 20180329856A1
• Filed: 04/30/2018
• Published: 11/15/2018
• Est. Priority Date: 05/10/2017
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: MISHRA, Lalan Jee, PRASAD, Mohit Kishore, WIETFELDT, Richard Dominic, CHUN, Christopher Kong Yee
• Granted Patent: US 10,521,392 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 13/102 where the programme performs an interfacing function, e.g. device driver G06F13/105 takes precedence; scheduling within device drivers G06F9/52; contention policies within device drivers G06F9/4881
• CPC Class Codes: G06F 13/1668 Details of memory controller
• CPC Class Codes: G06F 13/20 for access to input/output bus
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Systems, methods, and apparatus for communicating datagrams over a serial communication link are provided. A transmitting device generates an address field in a datagram, sets a value of at least one bit in the address field to indicate a number of bytes of data associated with a data frame of the datagram, generates the data frame in the datagram, the data frame including the number of bytes of data, and sends the datagram to a receiving device. A receiving device receives a datagram from a transmitting device, decodes an address field of the datagram to detect a number of bytes of data included in a data frame of the datagram based on a value of at least one bit in the address field, and decodes the data frame to recover the detected number of bytes of data.

Claims

1. A method performed at a transmitting device for sending a datagram to a receiving device, comprising:

generating an address field in a datagram;

setting a value of at least one bit in the address field to indicate a number of bytes of data associated with a data frame of the datagram;

generating the data frame in the datagram, the data frame including the number of bytes of data; and

sending the datagram to the receiving device via a bus interface.

2. The method of claim 1, wherein the transmitting device is a request-capable slave (RCS) and the datagram is sent across a system power management interface (SPMI) bus.

3. The method of claim 1, wherein:

the datagram is a master read datagram provoking the receiving device to perform a read operation with respect to the data included in the data frame;

or

the datagram is a master write datagram provoking the receiving device to perform a write operation with respect to the data included in the data frame.

4. The method of claim 1, wherein the setting the value of the at least one bit in the address field includes:

detecting the number of bytes of data associated with the data frame;

detecting whether a load-exponent mode is enabled or disabled; and

setting at least a first bit value and a second bit value in the address field according to the detected number of bytes of data and whether the load-exponent mode is enabled or disabled.

5. The method of claim 4,

wherein if the load-exponent mode is disabled, the detected number of bytes of data is equal to M+1, where M is an integer greater than or equal to 0 and less than or equal to 3 (0≤

M≤

3), and the first bit value and the second bit value are set such that a binary coded decimal value of the first bit value and the second bit value is equal to M, and

wherein if the load-exponent mode is enabled, the detected number of bytes of data is equal to 2^N, where N is an integer greater than or equal to 0 and less than or equal to 3 (0≤

N≤

3), and the first bit value and the second bit value are set such that a binary coded decimal value of the first bit value and the second bit value is equal to N.

6. The method of claim 5, further including communicating a configuration message indicating whether the load-exponent mode is enabled or disabled.

7. The method of claim 4, wherein the setting the value of the at least one bit in the address field further includes:

setting a third bit value and a fourth bit value in the address field according to the detected number of bytes of data and whether the load-exponent mode is enabled or disabled,

wherein if the load-exponent mode is disabled, the detected number of bytes of data is equal to P+1, where P is an integer greater than or equal to 0 and less than or equal to 15 (0≤

P≤

15), and the first bit value, the second bit value, the third bit value, and the fourth bit value are set such that a binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value is equal to P, and

wherein if the load-exponent mode is enabled, the detected number of bytes of data is equal to 2^Q+2^R, where Q is an integer greater than or equal to 0 and less than or equal to 3 (0≤

Q≤

3), R is an integer greater than or equal to 0 and less than or equal to 3 (0≤

R≤

3), the first bit value and the second bit value are set such that a binary coded decimal value of the first bit value and the second bit value is equal to Q, and the third bit value and the fourth bit value are set such that a binary coded decimal value of the third bit value and the fourth bit value is equal to R.

8. The method of claim 1, wherein the generating the data frame includes at least one of:

providing a bus park (BP) at an end of the number of bytes of data in the data frame;

or

providing the BP between each byte of data of the number of bytes of data in the data frame.

9. The method of claim 1, wherein a first portion of the address field includes the at least one bit indicating the number of bytes of data associated with the data frame and a second portion of the address field includes at least one other bit corresponding to an address of the receiving device.

10. A transmitting device for sending a datagram to a receiving device, comprising:

a bus interface; and

a processing circuit coupled to the bus interface and configured to;

generate an address field in a datagram,

set a value of at least one bit in the address field to indicate a number of bytes of data associated with a data frame of the datagram,

generate the data frame in the datagram, the data frame including the number of bytes of data, and

send the datagram to the receiving device via the bus interface.

11. The transmitting device of claim 10, wherein:

the datagram is a master read datagram provoking the receiving device to perform a read operation with respect to the data included in the data frame;

or

the datagram is a master write datagram provoking the receiving device to perform a write operation with respect to the data included in the data frame.

12. The transmitting device of claim 10, wherein the processing circuit configured to set the value of the at least one bit in the address field is configured to:

detect the number of bytes of data associated with the datagram;

detect whether a load-exponent mode is enabled or disabled; and

set at least a first bit value and a second bit value in the address field according to the detected number of bytes of data and whether the load-exponent mode is enabled or disabled.

13. The transmitting device of claim 12,

wherein if the load-exponent mode is disabled, the detected number of bytes of data is equal to M+1, where M is an integer greater than or equal to 0 and less than or equal to 3 (0≤

M≤

3), and the first bit value and the second bit value are set such that a binary coded decimal value of the first bit value and the second bit value is equal to M, and

wherein if the load-exponent mode is enabled, the detected number of bytes of data is equal to 2^N, where N is an integer greater than or equal to 0 and less than or equal to 3 (0≤

N≤

3), and the first bit value and the second bit value are set such that a binary coded decimal value of the first bit value and the second bit value is equal to N.

14. The transmitting device of claim 13, the processing circuit further configured to communicate a configuration message indicating whether the load-exponent mode is enabled or disabled.

15. The transmitting device of claim 10, wherein the processing circuit configured to generate the data frame is configured to at least one of:

provide a bus park (BP) at an end of the number of bytes of data in the data frame;

or

provide the BP between each byte of data of the number of bytes of data in the data frame.

16. A method performed at a receiving device for receiving a datagram from a transmitting device, comprising:

receiving a datagram from the transmitting device via a bus interface;

decoding an address field of the datagram to detect a number of bytes of data included in a data frame of the datagram based on a value of at least one bit in the address field; and

decoding the data frame to recover the detected number of bytes of data.

17. The method of claim 16, wherein the transmitting device is a request-capable slave (RCS) and the datagram is received across a system power management interface (SPMI) bus.

18. The method of claim 16, wherein:

the datagram is a master read datagram provoking the receiving device to perform a read operation with respect to the data included in the data frame;

or

the datagram is a master write datagram provoking the receiving device to perform a write operation with respect to the data included in the data frame.

19. The method of claim 16, wherein the decoding the address field includes:

reading a first bit value and a second bit value in the address field;

detecting whether a load-exponent mode is enabled or disabled; and

detecting the number of bytes of data included in the data frame based on at least the first bit value and the second bit value and whether the load-exponent mode is enabled or disabled.

20. The method of claim 19, wherein the detecting the number of bytes of data included in the data frame includes:

calculating a binary coded decimal value of the first bit value and the second bit value,

wherein if the load-exponent mode is disabled, the binary coded decimal value of the first bit value and the second bit value is equal to M, where M is an integer greater than or equal to 0 and less than or equal to 3 (0≤

M≤

3), and the detected number of bytes of data is equal to M+1, and

wherein if the load-exponent mode is enabled, the binary coded decimal value of the first bit value and the second bit value is equal to N, where N is an integer greater than or equal to 0 and less than or equal to 3 (0≤

N≤

3), and the detected number of bytes of data is equal to 2^N.

21. The method of claim 20, further including communicating a configuration message indicating whether the load-exponent mode is enabled or disabled.

22. The method of claim 19, wherein the decoding the address field further includes:

reading a third bit value and a fourth bit value in the address field; and

detecting the number of bytes of data included in the data frame further based on the third bit value and the fourth bit value,

wherein if the load-exponent mode is disabled, the detecting the number of bytes of data includes calculating a binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value, wherein the binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value is equal to P, where P is an integer greater than or equal to 0 and less than or equal to 15 (0≤

P≤

15), and the detected number of bytes of data is equal to P+1, and

wherein if the load-exponent mode is enabled, the detecting the number of bytes of data includes calculating a first binary coded decimal value of the first bit value and the second bit value wherein the first binary coded decimal value of the first bit value and the second bit value is equal to Q, where Q is an integer greater than or equal to 0 and less than or equal to 3 (0≤

Q≤

3), and calculating a second binary coded decimal value of the third bit value and the fourth bit value, wherein the second binary coded decimal value of the third bit value and the fourth bit value is equal to R, where R is an integer greater than or equal to 0 and less than or equal to 3 (0≤

R≤

3), and the detected number of bytes of data is equal to 2^Q+2^R.

23. The method of claim 16, wherein the decoding the data frame includes at least one of:

detecting a bus park (BP) at an end of the number of bytes of data in the data frame;

or

detecting the BP between each byte of data of the number of bytes of data in the data frame.

24. The method of claim 16, wherein a first portion of the address field includes the at least one bit on which detection of the number of bytes of data is based and a second portion of the address field includes at least one other bit corresponding to an address of the receiving device.

25. A receiving device for receiving a datagram from a transmitting device, comprising:

a bus interface; and

a processing circuit coupled to the bus interface and configured to;

receive a datagram from the transmitting device via the bus interface,

decode an address field of the datagram to detect a number of bytes of data included in a data frame of the datagram based on a value of at least one bit in the address field, and

decode the data frame to recover the detected number of bytes of data.

26. The receiving device of claim 25, wherein:

the datagram is a master read datagram provoking the receiving device to perform a read operation with respect to the data included in the data frame;

or

the datagram is a master write datagram provoking the receiving device to perform a write operation with respect to the data included in the data frame.

27. The receiving device of claim 25, wherein the processing circuit configured to decode the address field is configured to:

read a first bit value and a second bit value in the address field;

detect whether a load-exponent mode is enabled or disabled; and

detect the number of bytes of data included in the data frame based on at least the first bit value and the second bit value and whether the load-exponent mode is enabled or disabled.

28. The receiving device of claim 27, wherein the processing circuit configured to detect the number of bytes of data included in the data frame is configured to:

calculate a binary coded decimal value of the first bit value and the second bit value,

wherein if the load-exponent mode is disabled, the binary coded decimal value of the first bit value and the second bit value is equal to M, where M is an integer greater than or equal to 0 and less than or equal to 3 (0≤

M≤

3), and the detected number of bytes of data is equal to M+1, and

wherein if the load-exponent mode is enabled, the binary coded decimal value of the first bit value and the second bit value is equal to N, where N is an integer greater than or equal to 0 and less than or equal to 3 (0≤

N≤

3), and the detected number of bytes of data is equal to 2^N.

29. The receiving device of claim 28, the processing circuit further configured to communicate a configuration message indicating whether the load-exponent mode is enabled or disabled.

30. The receiving device of claim 25, wherein the processing circuit configured to decode the data frame is configured to at least one of:

detect a bus park (BP) at an end of the number of bytes of data in the data frame;

or

detect the BP between each byte of data of the number of bytes of data in the data frame.