SWITCH LINEARIZATION WITH ANTI-SERIES VARACTOR

• US 20180337670A1
• Filed: 05/16/2018
• Published: 11/22/2018
• Est. Priority Date: 05/17/2017
• Status: Active Application

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Zhu, Yu, Bartle, Dylan Charles, DiCarlo, Paul T.
• Application Number:
  US15/981,086
• Publication Number:
  US 20180337670A1
• Time in Patent Office: Days
• CPC Class Codes: H03K 17/145 in field-effect transistor switches
• CPC Class Codes: H03K 17/16 Modifications for eliminating interference voltages or currents
• CPC Class Codes: H03K 17/161 in field-effect transistor switches
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H04B 1/44 Transmit/receive switching

Abstract

A radio frequency signal switch is provided and includes an input port and an output port with a signal path including a transistor coupled between the input port and the output port. A first shunt circuit, also including a transistor, has a terminal coupled to the signal path and another terminal coupled to a reference node, and a second shunt circuit including a varactor has a terminal coupled to the signal path and another terminal coupled to the reference node.

Claims

1. A radio frequency signal switch, comprising:

an input port and an output port;

a signal path including at least one series transistor coupled between the input port and the output port;

a first shunt circuit having a first shunt terminal coupled to the signal path and a second shunt terminal coupled to a reference node, the first shunt circuit including at least one shunt transistor; and

a second shunt circuit having a third shunt terminal coupled to the signal path and a fourth shunt terminal coupled to the reference node, the second shunt circuit including at least one varactor.

2. The radio frequency signal switch of claim 1 wherein the at least one varactor is a stack of anti-series varactors connected in series between the third shunt terminal and the fourth shunt terminal.

3. The radio frequency signal switch of claim 2 wherein the first shunt circuit includes a plurality of transistors connected in series between the first shunt terminal and the second shunt terminal.

4. The radio frequency signal switch of claim 2 wherein the signal path includes a plurality of transistors connected in series between the input port and the output port.

5. The radio frequency signal switch of claim 2 wherein each anti-series varactor includes two field effect transistors, a gate terminal of each of the field effect transistors being electrically connected to the gate terminal of the other field effect transistor to form a common gate terminal, and each of the field effect transistors having a drain terminal electrically connected to a source terminal to form a varactor terminal.

6. The radio frequency signal switch of claim 1 wherein the at least one varactor is configured to produce a first intermodulation product substantially out of phase with a second intermodulation product produced by the at least one shunt transistor.

7. The radio frequency signal switch of claim 1 wherein the at least one varactor is a stack of anti-series varactors connected in series and the first shunt circuit includes a plurality of transistors connected in series, and the stack of anti-series varactors is configured to produce a first intermodulation product substantially out of phase with a second intermodulation product produced by the plurality of transistors connected in series.

8. A method of designing a signal switch, comprising:

selecting a series transistor structure to provide a signal path from an input to an output;

selecting a shunt transistor structure to provide a shunt path from the signal path to a reference node; and

selecting a shunt varactor structure to provide a non-linear capacitance between the signal path and the reference node.

9. The method of claim 8 wherein selecting the shunt varactor structure includes selecting a number of anti-series varactor pairs to be connected in series at least in part to accommodate an intermodulation distortion product of the shunt transistor structure.

10. The method of claim 9 wherein selecting the number of anti-series varactor pairs to accommodate an intermodulation distortion product of the shunt transistor structure includes selecting the anti-series varactor pairs to produce a second intermodulation distortion product out of phase with the intermodulation distortion product of the shunt transistor structure.

11. The method of claim 9 wherein selecting the anti-series varactor pairs includes selecting anti-series varactor pairs formed from two field effect transistors having electrically connected gate terminals.

12. The method of claim 8 wherein selecting the shunt transistor structure includes selecting a number of transistors in series at least in part to accommodate a signal amplitude provided on the signal path.

13. The method of claim 12 wherein selecting the shunt varactor structure includes selecting a number of anti-series varactor pairs to be connected in series at least in part to accommodate an intermodulation distortion product of the shunt transistor structure.

14. The method of claim 8 wherein selecting the series transistor structure includes selecting a number of transistors in series at least in part to provide an isolation performance figure when the signal switch is in an off state where a signal received at the input is substantially blocked from reaching the output.

15. A signal switching device, comprising:

an input port and an output port;

a series transistor circuit coupled between the input port and the output port;

a transistor stack coupled between the series transistor circuit and a reference node, the transistor stack including a plurality of transistors connected in series; and

a varactor stack coupled between the series transistor circuit and the reference node, the varactor stack including a plurality of varactors connected in series.

16. The signal switching device of claim 15 wherein each of the plurality of varactors is an anti-series varactor.

17. The signal switching device of claim 16 wherein each anti-series varactor includes two field effect transistors, a gate terminal of each of the field effect transistors being electrically connected to the gate terminal of the other field effect transistor to form a common gate terminal, and each of the field effect transistors having a drain terminal electrically connected to a source terminal.

18. The signal switching device of claim 15 wherein the series transistor circuit includes a plurality of transistors connected in series between the input port and the output port.

19. The signal switching device of claim 15 wherein the varactor stack is configured to produce a first intermodulation product substantially out of phase with a second intermodulation product produced by the transistor stack.

20. The signal switching device of claim 15 wherein a number and size of the plurality of varactors is sufficient to produce at least one non-linear signal component of substantially a same amplitude as a non-linear signal component produced by the transistor stack.