DUAL CLUSTERS OF FULLY CONNECTED INTEGRATED CIRCUIT MULTIPROCESSORS WITH SHARED HIGH-LEVEL CACHE
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Abstract
Embodiments of the present invention are directed to managing a shared high-level cache for dual clusters of fully connected integrated circuit multiprocessors. An example of a computer-implemented method includes: providing a drawer comprising a plurality of clusters, each of the plurality of clusters comprising a plurality of processors; providing a shared cache integrated circuit to manage a shared cache memory among the plurality of clusters; receiving, by the shared cache integrated circuit, an operation of one of a plurality of operation types from one of the plurality of processors; and processing, by the shared cache integrated circuit, the operation based at least in part on the operation type of the operation according to a set of rules for processing the operation type.
26 Citations
16 Claims
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1-8. -8. (canceled)
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9. A system comprising:
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a drawer comprising a plurality of clusters, each of the plurality of clusters comprising a plurality of processors, each of the plurality of processors comprising a plurality of processing cores having a private Level 1 cache and a private Level 2 cache, the processing cores within each of the plurality of clusters sharing a shared Level 3 cache; and a single shared cache integrated circuit to manage a shared Level 4 cache memory among the plurality of clusters, wherein the shared cache integrated circuit is configured to store computer readable instructions and execute the computer readable instructions for performing a method, the method comprising; receiving, by the single shared cache integrated circuit, an operation of one of a plurality of operation types from one of the plurality of processors, and processing, by the single shared cache integrated circuit, the operation based at least in part on the operation type of the operation according to a set of rules for processing the operation type. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification