THERMALLY ENHANCED SEMICONDUCTOR PACKAGE AND PROCESS FOR MAKING THE SAME
First Claim
1. A method comprising:
- providing a precursor package including a module substrate, a thinned flip chip die, and a mold compound component, wherein;
the thinned flip chip die comprises a device layer with electronic components, a dielectric layer over an upper surface of the device layer, and a plurality of interconnects extending from a lower surface of the device layer and coupled to an upper surface of the module substrate;
the mold compound component resides over the upper surface of the module substrate, surrounds the thinned flip chip die, and extends above an upper surface of the thinned flip chip die to form a cavity above the upper surface of the thinned flip chip die; and
the mold compound component is not over the thinned flip chip die;
depositing a thermally conductive film over at least the upper surface of the thinned flip chip die at a bottom of the cavity; and
applying a thermally enhanced mold compound component over at least a portion of the thermally conductive film to fill the cavity.
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Accused Products
Abstract
The present disclosure relates to a thermally enhanced semiconductor package, which includes a module substrate, a thinned flip chip die over the module substrate, a mold compound component, a thermally conductive film, and a thermally enhanced mold compound component. The mold compound component resides over the module substrate, surrounds the thinned flip chip die, and extends above an upper surface of the thinned flip chip die to form a cavity over the upper surface of the thinned flip chip die. The thermally conductive film resides over at least the upper surface of the thinned flip chip at the bottom of the cavity. The thermally enhanced mold compound component resides over at least a portion of the thermally conductive film to fill the cavity.
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Citations
20 Claims
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1. A method comprising:
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providing a precursor package including a module substrate, a thinned flip chip die, and a mold compound component, wherein; the thinned flip chip die comprises a device layer with electronic components, a dielectric layer over an upper surface of the device layer, and a plurality of interconnects extending from a lower surface of the device layer and coupled to an upper surface of the module substrate; the mold compound component resides over the upper surface of the module substrate, surrounds the thinned flip chip die, and extends above an upper surface of the thinned flip chip die to form a cavity above the upper surface of the thinned flip chip die; and the mold compound component is not over the thinned flip chip die; depositing a thermally conductive film over at least the upper surface of the thinned flip chip die at a bottom of the cavity; and applying a thermally enhanced mold compound component over at least a portion of the thermally conductive film to fill the cavity. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification