Caching Policy In A Multicore System On A Chip (SOC)

• US 20180349292A1
• Filed: 06/01/2017
• Published: 12/06/2018
• Est. Priority Date: 06/01/2017
• Status: Active Grant

• Current Assignee: Mellanox Technologies Limited (NVIDIA Corporation)
• Original Assignee: Mellanox Technologies Limited (NVIDIA Corporation)
• Inventors: Tal, Gilad, Moran, Gil, Menes, Miriam, Kopilov, Gil, Raikin, Shlomo
• Granted Patent: US 10,789,175 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0808 with cache invalidating means G06F12/0815 takes precedence
• CPC Class Codes: G06F 12/123 with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
• CPC Class Codes: G06F 2212/1044 Space efficiency improvement
• CPC Class Codes: G06F 2212/60 Details of cache memory
• CPC Class Codes: G06F 2212/601 Reconfiguration of cache memory
• CPC Class Codes: G06F 2212/62 Details of cache specific to multiprocessor cache arrangements

Abstract

A computing system comprises one or more cores. Each core comprises a processor and switch with each processor coupled to a communication network among the cores. Also disclosed are techniques for implementing an adaptive last level allocation policy in a last level cache in a multicore system receiving one or more new blocks for allocating for storage in the cache, accessing a selected access profile from plural access profiles that define allocation actions, according to a least recently used type of allocation and based on a cache action, a state bit, and traffic pattern type for the new blocks of data and handling the new block according to the selected access profile for a selected least recently used (LRU) position in the cache.

Claims

1. A system implementing an adaptive last level allocation policy in a last level cache comprises:

a multicore system configured to;

receive a stream having a stream type for allocating as new cache blocks for storage in the cache;

access a selected access profile from plural access profiles that define allocation actions according to a least recently used type of allocation policy, and based at least in part on a type of cache action, a state bit having a status that is used to determine whether to modify the selected replacement policy, and the stream type for the new cache blocks; and

allocate the new stream according to the selected access profile for a selected least recently used (LRU) position in the cache.

2. The system of claim 1 wherein each access profile is programmed separately for any case of read-miss, write-miss, read-hit with initial state bit state 0 or 1, and write hit with initial state bit state 0 or 1.

3. The system of claim 1 wherein the selection of a profile is based on the stream type, with stream type including one of TO traffic, search, program instructions, data, and accelerator chained operations.

4. The system of claim 1 wherein within each profile and within each scenario of a read/write hit/miss and state bit state of 0 or 1 there are two selectable actions, and choosing between the actions is based on a programmable probability.

5. The system of claim 1 wherein the last level cache includes a plurality of ways, including an LRU 0 way, and the selected profile is a write miss for streaming type of data, which profile allocates at a selected position sets the state bit on newly allocated line and evicts the LRU 0 way.

6. The system of claim 1 wherein the selected profile is a write hit for streaming type data that upgrades an LRU position and sets the state bit.

7. The system of claim 1 wherein the selected profile is a read miss streaming type data profile that causes the policy to not allocate positions in cache.

8. The system of claim 1 wherein the selected profile is a read hit streaming type data that causes the policy to downgrade or not change a current LRU position and clear the state bit.

9. The system of claim 1 wherein the selected profile is a write miss for a short structure type that causes the policy to allocate in an LRU0 position and clear the state bit.

10. The system of claim 1 wherein the selected profile is a write hit for a short structure type that causes the policy to not change an LRU position and select a next value of the state bit.

11. The system of claim 1 wherein the selected profile is a read that causes the policy to not allocate if the state bit is set at a LRU0 position.

12. The system of claim 1 wherein the selected profile is a read hit for a short structure type that causes the policy upgrade a LRU position by a programmable amount.

13. The system of claim 1 further configured to:

select a replacement policy according to a data traffic pattern type.

14. The system of claim 13 wherein the data traffic pattern type is a rate of streaming IO data.

15. The system of claim 13 wherein the data traffic pattern type is a rate of random accesses to short data structures.

16. The system of claim 13 wherein the data traffic pattern type is selected from the group consisting of high rate of random accesses to short data structures, high rate of streaming IO data, with high rate being relative to DRAM bandwidth, program instructions, program data, controlled acceleration chaining.

17. A method of implementing a last level allocation policy in a last level cache in a multicore system, the method comprising:

receiving a stream having a stream type for allocating as new cache blocks for storage in the cache;

accessing a selected access profile from plural access profiles that define allocation actions according to a least recently used type of allocation policy, and based at least in part on a type of cache action, a state bit having a status that is used to determine whether to modify the selected replacement policy, and stream type for the new cache blocks; and

allocating the new stream according to the selected access profile for a selected least recently used (LRU) position in the cache.

18. A computer program product tangibly stored on a computer readable medium for implementing a last level allocation policy in a last level cache in a multicore system, the computer program product comprising instructions to:

receive a stream having a stream type for allocating as new cache blocks for storage in the cache;

access a selected access profile from plural access profiles that define allocation actions according to a least recently used type of allocation policy, and based at least in part on a type of a cache action, a state bit having a status that is used to determine whether to modify the selected replacement policy, and stream type for the new cache blocks; and

allocate the new stream according to the selected access profile for a selected east recently used (LRU) position in the cache.