INDUCTORS FOR CHIP TO CHIP NEAR FIELD COMMUNICATION

• US 20180366535A1
• Filed: 06/16/2017
• Published: 12/20/2018
• Est. Priority Date: 06/16/2017
• Status: Active Grant

• Current Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Inventors: Chong, Euhan, Tonietto, Davide, Xiang, Zhonggui
• Granted Patent: US 10,483,343 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 2224/023 Redistribution layers [RDL] for bonding areas
• CPC Class Codes: H01L 2224/05095 at the periphery of the internal layers
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 23/48 Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H04B 5/22 Capacitive coupling
• CPC Class Codes: H04B 5/24 Inductive coupling

Abstract

A device includes a first inductor positioned on a first substrate. The first inductor has at least one turn in a plane that is perpendicular to a plane of the first substrate. The first inductor is positioned for near field coupling with a second inductor. The second inductor is positioned on a second substrate, with at least one turn that is in a plane perpendicular to a plane of the second substrate. The second inductor is substantially parallel to the first inductor. Such an arrangement may be used for near field coupling, including edge-to-edge coupling, between two integrated circuits.

Claims

1. A device comprising:

at least one inductor positioned on a substrate, the substrate defining a plane, the at least one inductor having at least one turn in a plane that is perpendicular to the plane of the substrate, the at least one inductor being positioned for near field coupling with another inductor

wherein the at least one inductor comprises segments of a first metal layer of the substrate and segments of a second metal layer, the segments being electrically coupled through at least one via to form at least one turn of the at least one inductor; and

wherein the at least one turn of the at least one inductor has first and second ends and wherein the first end is laterally offset from the second end and the inductor is configured to generate additional turns in a multi-metal staircase pattern by connecting the first and second ends of the at least one turn.

2. The device of claim 1 wherein the at least one inductor is positioned at or near an edge of the substrate.

3. The device of claim 1 wherein the at least one inductor is one of a series peaking inductor, a shunt peaking inductor, or a T-coil.

4. The device of claim 1 wherein the substrate comprises an integrated circuit.

5. The device of claim 4 wherein the at least one inductor comprises a first segment of a first metal layer of the integrated circuit and a second segment of a second metal layer of the integrated circuit, the first and second segments being electrically coupled through at least one via to form at least one turn of the at least one inductor.

6. The device of claim 4 wherein:

a top section of the at least one inductor is defined by a segment of an upper metal layer of the integrated circuit;

side sections of the at least one inductor is are defined by one or more respective segments of one or more middle metal layers of the integrated circuit; and

a bottom section of the at least one inductor is defined by one or more respective segments of one or more lower metal layers of the integrated circuit; and

the respective segments are electrically coupled through vias to form at least one turn of the at least one inductor.

7. The device of claim 6 wherein the upper metal layer is a redistribution design layer (RDL) of the integrated circuit.

8. The device of claim 7 wherein the upper metal layer is an aluminum for bond pad (AP) layer of the integrated circuit.

9. The device of claim 1 wherein the at least one inductor comprises multiple turns.

10. The device of claim 9 wherein the substrate is an integrated circuit.

11. The device of claim 9 wherein the turns of the at least one inductor are similar to each other in dimensions.

12. A device comprising:

a first inductor positioned on a first substrate, the first substrate defining a plane, the first inductor having at least one turn that is in a plane perpendicular to the plane of the first substrate; and

a second inductor positioned on a second substrate, the second substrate defining a plane, the second inductor having at least one turn that is in a plane perpendicular to the plane of the second substrate, the planes of the first and second substrates being substantially parallel to each other;

wherein the first and second inductors are designed to be inductively coupled to each other;

wherein at least one of the inductors comprises segments of a first metal layer of the substrate and segments of a second metal layer, the segments being electrically coupled through at least one via to form at least one turn of the inductor; and

wherein the at least one turn of the at least one inductor has first and second ends and wherein the first end is laterally offset from the second end and the inductor is configured to generate additional turns in a multi-metal staircase pattern by connecting the first and second ends of the at least one turn.

13. The device of claim 12 wherein at least one of the inductors is one of a series peaking inductor, a shunt peaking inductor, or a T-coil.

14. The device of claim 12 wherein the first substrate comprises an integrated circuit.

15. The device of claim 14 wherein the first inductor comprises a first segment of a first metal layer of the integrated circuit and a second segment of a second metal layer of the integrated circuit, the first and second segments being electrically coupled through at least one via to form at least one turn of the first inductor.

16. The device of claim 14 wherein:

a top section of the first inductor is defined by a segment of an upper metal layer of the integrated circuit;

side sections of the first inductor are defined by one or more respective segments of one or more middle metal layers of the integrated circuit; and

a bottom section of the first inductor is defined by one or more respective segments of one or more lower metal layers of the integrated circuit; and

the respective segments are electrically coupled through vias to form at least one turn of the first inductor.

17. The device of claim 16 wherein the upper metal layer is a redistribution design layer (RDL) of the integrated circuit.

18. The device of claim 16 wherein the upper metal layer is an Aluminum for bond pad (AP) layer of the integrated circuit.

19. The device of claim 12 wherein the first and second substrates are positioned edge-to-edge.

20. The device of claim 12 wherein the first inductor comprises multiple turns.

22. The device of claim 12 wherein the first and second inductors are used for near field communication in a system-in-package, a system-on-a-chip, a system-on-package or a multi-chip module.

21. (canceled)