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RESONANT LOAD POWER CONVERSION DEVICE AND TIME DIVISION OPERATION METHOD FOR RESONANT LOAD POWER CONVERSION DEVICE

  • US 20180375442A1
  • Filed: 11/16/2016
  • Published: 12/27/2018
  • Est. Priority Date: 12/16/2015
  • Status: Active Grant
First Claim
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1. A resonant load power conversion device having a single-phase inverter whose DC input side is connected to a DC voltage source and whose output side is connected to a resonant load and which outputs a rectangular wave voltage at resonance frequency, comprising:

  • switch group circuits that are connected to respective upper and lower arms of one phase of the single-phase inverter and the other phase of the single-phase inverter, each of the switch group circuits being configured so that N (N=an integer of 2 or more) series bodies each having M (M=an integer of 2 or more) switching elements are connected parallel by main circuit conductors, and wherein,the switch group circuit of the upper arm, which is the one phase of the single-phase inverter, has a first series body in which two switching elements of U11 and U12 are connected in series, a second series body in which two switching elements of U21 and U22 are connected in series and a third series body in which two switching elements of U31 and U32 are connected in series, and the switch group circuit is configured so that the three series bodies of the first to third series bodies are connected parallel by the main circuit conductors,the switch group circuit of the lower arm, which is the one phase of the single-phase inverter, has a first series body in which two switching elements of X11 and X12 are connected in series, a second series body in which two switching elements of X21 and X22 are connected in series and a third series body in which two switching elements of X31 and X32 are connected in series, and the switch group circuit is configured so that the three series bodies of the first to third series bodies are connected parallel by the main circuit conductors,the switch group circuit of the upper arm, which is the other phase of the single-phase inverter, has a first series body in which two switching elements of V11 and V12 are connected in series, a second series body in which two switching elements of V21 and V22 are connected in series and a third series body in which two switching elements of V31 and V32 are connected in series, and the switch group circuit is configured so that the three series bodies of the first to third series bodies are connected parallel by the main circuit conductors, andthe switch group circuit of the lower arm, which is the other phase of the single-phase inverter, has a first series body in which two switching elements of Y11 and Y12 are connected in series, a second series body in which two switching elements of Y21 and Y22 are connected in series and a third series body in which two switching elements of Y31 and Y32 are connected in series, and the switch group circuit is configured so that the three series bodies of the first to third series bodies are connected parallel by the main circuit conductors; and

    a controller that performs switching control of each switching element of the switch group circuits of the single-phase inverter by time division of 1/(M×

    N), and has a gate command generator that generatesa clock with ON and OFF of an output voltage command of the single-phase inverter being a trigger,a switching element U11 and Y11 gate command signal with (2×

    2 (=the number M of series connection)×

    3 (the number N of parallel connection)) clocks being one cycle and with an ON signal being outputted for a period of (2×

    3 (=the number N of parallel connection)×

    1(=the number M of series connection−

    1)+1) clocks and an OFF signal being outputted for a period of [(2×

    2 (=the number M of series connection)×

    3 (=the number N of parallel connection))−

    (2×

    3 (=the number N of parallel connection)×

    1(=the number M of series connection−

    1)+1)] clocks,a switching element X11 and V11 gate command signal that is delayed by 1 clock with respect to the switching element U11 and Y11 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element U11 and Y11 gate command signal,a switching element U21 and Y21 gate command signal that is delayed by 1 clock with respect to the switching element X11 and V11 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element X11 and V11 gate command signal,a switching element X21 and V21 gate command signal that is delayed by 1 clock with respect to the switching element U21 and Y21 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element U21 and Y21 gate command signal,a switching element U31 and Y31 gate command signal that is delayed by 1 clock with respect to the switching element X21 and V21 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element X21 and V21 gate command signal,a switching element X31 and V31 gate command signal that is delayed by 1 clock with respect to the switching element U31 and Y31 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element U31 and Y31 gate command signal,a switching element U12 and Y12 gate command signal that is delayed by 1 clock with respect to the switching element X31 and V31 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element X31 and V31 gate command signal,a switching element X12 and V12 gate command signal that is delayed by 1 clock with respect to the switching element U12 and Y12 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element U12 and Y12 gate command signal,a switching element U22 and Y22 gate command signal that is delayed by 1 clock with respect to the switching element X12 and V12 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element X12 and V12 gate command signal,a switching element X22 and V22 gate command signal that is delayed by 1 clock with respect to the switching element U22 and Y22 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element U22 and Y22 gate command signal,a switching element U32 and Y32 gate command signal that is delayed by 1 clock with respect to the switching element X22 and V22 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element X22 and V22 gate command signal, anda switching element X32 and V32 gate command signal that is delayed by 1 clock with respect to the switching element U32 and Y32 gate command signal and has the same ON and OFF periods as ON and OFF periods of the switching element U32 and Y32 gate command signal, and whereineach of the switching elements is ON/OFF-controlled by each of the generated gate command signals.

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