PROCESSORS AND METHODS FOR PIPELINED RUNTIME SERVICES IN A SPATIAL ARRAY

• US 20190004994A1
• Filed: 07/01/2017
• Published: 01/03/2019
• Est. Priority Date: 07/01/2017
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Kent D. Glossop, Simon C. Steely
• Inventors: FLEMING, KERMIN, STEELY, SIMON C., GLOSSOP, KENT D.
• Granted Patent: US 10,467,183 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 15/7875 for multiple contexts
• CPC Class Codes: G06F 15/7878 for pipeline reconfiguration
• CPC Class Codes: G06F 15/80 comprising an array of processing units with common control, e.g. single instruction multiple data processors G06F15/82 takes precedence ; for correlation function computation G06F17/15
• CPC Class Codes: G06F 15/8023 Two dimensional arrays, e.g. mesh, torus
• CPC Class Codes: G06F 15/825 Dataflow computers

Abstract

Methods and apparatuses relating to pipelined runtime services in spatial arrays are described. In one embodiment, a processor includes processing elements; an interconnect network between the processing elements; a first configuration controller coupled to a first subset of the processing elements; and a second configuration controller coupled to a second, different subset of the processing elements, the first configuration controller and the second configuration controller are to configure the first subset and the second, different subset according to configuration information for a first context, and, for a context switch, the first configuration controller is to configure the first subset according to configuration information for a second context after pending operations of the first context are completed in the first subset and block second context dataflow into the second, different subset'"'"'s input from the first subset'"'"'s output until pending operations of the first context are completed in the second, different subset.

Claims

1. A processor comprising:

a plurality of processing elements;

an interconnect network between the plurality of processing elements to receive an input of a dataflow graph comprising a plurality of nodes, wherein the dataflow graph is to be overlaid into the interconnect network and the plurality of processing elements with each node represented as a dataflow operator in the interconnect network and the plurality of processing elements, and the plurality of processing elements is to perform an operation when an incoming operand set arrives at the plurality of processing elements; and

a configuration controller coupled to a first subset and a second, different subset of the plurality of processing elements, the first subset of the plurality of processing elements having an output coupled to an input of the second, different subset of the plurality of processing elements, wherein the configuration controller is to configure the first subset and the second, different subset of the plurality of processing elements according to configuration information for a first context of a dataflow graph, and, for a requested context switch, configure the first subset of the plurality of processing elements according to configuration information for a second context of a dataflow graph after pending operations of the first context are completed in the first subset and block second context dataflow into the input of the second, different subset of the plurality of processing elements from the output of the first subset of the plurality of processing elements until pending operations of the first context are completed in the second, different subset of the plurality of processing elements.

2. The processor of claim 1, further comprising a first local configuration controller of the first subset and a second local configuration controller of the second, different subset of the plurality of processing elements, wherein the configuration controller is to send corresponding configuration information to each of the first local configuration controller and the second local configuration controller.

3. The processor of claim 1, wherein the configuration controller further comprises an extraction controller to cause state data from the first subset and the second, different subset of the plurality of processing elements to be saved to memory, and the extraction controller is to, for the requested context switch, extract first state data from the first subset of the plurality of processing elements after the pending operations of the first context are completed in the first subset.

4. The processor of claim 1, wherein the plurality of processing elements further comprises a third, different subset of the plurality of processing elements between the output of the first subset of the plurality of processing elements and the input of the second, different subset of the plurality of processing elements, and the configuration controller is to, for the requested context switch, keep the third, different subset of the plurality of processing elements in an unconfigured state to block second context dataflow from the output of the first subset of the plurality of processing elements to the input of the second, different subset of the plurality of processing elements until the pending operations of the first context are completed in the second, different subset of the plurality of processing elements.

5. The processor of claim 4, wherein the configuration controller is to cause a backpressure signal of the third, different subset of the plurality of processing elements to be output for the unconfigured state to the first subset of the plurality of processing elements.

6. The processor of claim 1, wherein the configuration controller is to allow operations of the first context in the second, different subset of the plurality of processing elements concurrently with operations of the second context in the first subset of the plurality of processing elements.

7. A method comprising:

providing a processor, comprising a plurality of processing elements and an interconnect network between the plurality of processing elements, having a dataflow graph comprising a plurality of nodes overlaid into the plurality of processing elements of the processor and the interconnect network between the plurality of processing elements of the processor with each node represented as a dataflow operator in the interconnect network and the plurality of processing elements;

performing an operation of the dataflow graph with the interconnect network and the plurality of processing elements when an incoming operand set arrives at the plurality of processing elements;

configuring, with a configuration controller of the processor, a first subset and a second, different subset of the plurality of processing elements according to configuration information for a first context of a dataflow graph; and

configuring, for a requested context switch with the configuration controller of the processor, the first subset of the plurality of processing elements according to configuration information for a second context of a dataflow graph after pending operations of the first context are completed in the first subset and blocking second context dataflow into an input of the second, different subset from an output of the first subset until pending operations of the first context are completed in the second, different subset.

8. The method of claim 7, further comprising the configuration controller sending corresponding configuration information to each of a first local configuration controller of the first subset and a second local configuration controller of the second, different subset.

9. The method of claim 7, further comprising, for the requested context switch, extracting first state data from the first subset after the pending operations of the first context are completed in the first subset.

10. The method of claim 7, further comprising, for the requested context switch with the configuration controller, keeping a third, different subset of the plurality of processing elements between the output of the first subset and the input of the second, different subset in an unconfigured state to block second context dataflow from the output of the first subset to the input of the second, different subset until the pending operations of the first context are completed in the second, different subset.

11. The method of claim 10, wherein the keeping comprises causing a backpressure signal of the third, different subset to be output for the unconfigured state to the first subset of the plurality of processing elements.

12. The method of claim 7, further comprising allowing, with the configuration controller, operations of the first context in the second, different subset concurrently with operations of the second context in the first subset.

13. A processor comprising:

a plurality of processing elements;

an interconnect network between the plurality of processing elements to receive an input of a dataflow graph comprising a plurality of nodes, wherein the dataflow graph is to be overlaid into the interconnect network and the plurality of processing elements with each node represented as a dataflow operator in the interconnect network and the plurality of processing elements, and the plurality of processing elements is to perform an operation when an incoming operand set arrives at the plurality of processing elements;

a first configuration controller coupled to a first subset of the plurality of processing elements; and

a second configuration controller coupled to a second, different subset of the plurality of processing elements, and the first subset having an output coupled to an input of the second, different subset, wherein the first configuration controller and the second configuration controller are to configure the first subset and the second, different subset of the plurality of processing elements according to configuration information for a first context of a dataflow graph, and, for a requested context switch, the first configuration controller is to configure the first subset of the plurality of processing elements according to configuration information for a second context of a dataflow graph after pending operations of the first context are completed in the first subset and block second context dataflow into the input of the second, different subset from the output of the first subset until pending operations of the first context are completed in the second, different subset.

14. The processor of claim 13, further comprising a higher-level configuration controller coupled to the first configuration controller and the second configuration controller, wherein the higher-level configuration controller is to send corresponding configuration information to each of the first configuration controller and the second configuration controller.

15. The processor of claim 13, wherein the first configuration controller further comprises an extraction controller to cause state data from the first subset of the plurality of processing elements to be saved to memory, and the extraction controller is to, for the requested context switch, extract first state data from the first subset after the pending operations of the first context are completed in the first subset.

16. The processor of claim 13, wherein the plurality of processing elements further comprises a third, different subset of the plurality of processing elements between the output of the first subset and the input of the second, different subset, and a third configuration controller is coupled to the third, different subset to, for the requested context switch, keep the third, different subset of the plurality of processing elements in an unconfigured state to block second context dataflow from the output of the first subset to the input of the second, different subset until the pending operations of the first context are completed in the second, different subset.

17. The processor of claim 16, wherein the third configuration controller is to cause a backpressure signal of the third, different subset to be output for the unconfigured state to the first subset of the plurality of processing elements.

18. The processor of claim 13, wherein the first configuration controller and the second configuration controller are to allow operations of the first context in the second, different subset concurrently with operations of the second context in the first subset.

19. A method comprising:

providing a processor, comprising a plurality of processing elements and an interconnect network between the plurality of processing elements, having a dataflow graph comprising a plurality of nodes overlaid into the plurality of processing elements of the processor and the interconnect network between the plurality of processing elements of the processor with each node represented as a dataflow operator in the interconnect network and the plurality of processing elements;

performing an operation of the dataflow graph with the interconnect network and the plurality of processing elements when an incoming operand set arrives at the plurality of processing elements;

configuring, with a first configuration controller and a second configuration controller of the processor, a first subset and a second, different subset of the plurality of processing elements according to corresponding configuration information for a first context of a dataflow graph; and

configuring, for a requested context switch with the first configuration controller of the processor, the first subset of the plurality of processing elements according to configuration information for a second context of a dataflow graph after pending operations of the first context are completed in the first subset and blocking second context dataflow into an input of the second, different subset from an output of the first subset until pending operations of the first context are completed in the second, different subset.

20. The method of claim 19, further comprising sending, with a higher-level configuration controller of the processor, the corresponding configuration information to each of the first configuration controller of the first subset and the second configuration controller of the second, different subset.

21. The method of claim 19, further comprising, for the requested context switch, extracting first state data from the first subset after the pending operations of the first context are completed in the first subset.

22. The method of claim 19, further comprising, for the requested context switch, keeping a third, different subset of the plurality of processing elements between the output of the first subset and the input of the second, different subset in an unconfigured state with a third configuration controller of the third, different subset to block second context dataflow from the output of the first subset to the input of the second, different subset until the pending operations of the first context are completed in the second, different subset.

23. The method of claim 22, wherein the keeping comprises causing a backpressure signal of the third, different subset to be output for the unconfigured state to the first subset of the plurality of processing elements.

24. The method of claim 19, further comprising allowing, with the first configuration controller and the second configuration controller, operations of the first context in the second, different subset concurrently with operations of the second context in the first subset.